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-rw-r--r--Makefile26
-rw-r--r--frontends/ilang/Makefile.inc6
-rw-r--r--frontends/ilang/ilang_lexer.l2
-rw-r--r--frontends/ilang/ilang_parser.y2
-rw-r--r--frontends/verilog/Makefile.inc6
-rw-r--r--frontends/verilog/verilog_lexer.l2
-rw-r--r--frontends/verilog/verilog_parser.y2
-rw-r--r--passes/techmap/Makefile.inc2
-rw-r--r--techlibs/common/Makefile.inc7
-rw-r--r--techlibs/common/blackbox.sed5
-rw-r--r--techlibs/ice40/Makefile.inc5
-rw-r--r--techlibs/xilinx/Makefile.inc8
12 files changed, 32 insertions, 41 deletions
diff --git a/Makefile b/Makefile
index f5a61b13..3fb9c570 100644
--- a/Makefile
+++ b/Makefile
@@ -36,8 +36,10 @@ SMALL = 0
all: top-all
-YOSYS_SRC := $(shell pwd)
-CXXFLAGS = -Wall -Wextra -ggdb -I"$(YOSYS_SRC)" -MD -D_YOSYS_ -fPIC -I$(DESTDIR)/include
+YOSYS_SRC := $(dir $(firstword $(MAKEFILE_LIST)))
+VPATH := $(YOSYS_SRC)
+
+CXXFLAGS = -Wall -Wextra -ggdb -I. -I"$(YOSYS_SRC)" -MD -D_YOSYS_ -fPIC -I$(DESTDIR)/include
LDFLAGS = -L$(DESTDIR)/lib
LDLIBS = -lstdc++ -lm
SED = sed
@@ -190,7 +192,7 @@ define add_share_file
EXTRA_TARGETS += $(subst //,/,$(1)/$(notdir $(2)))
$(subst //,/,$(1)/$(notdir $(2))): $(2)
$$(P) mkdir -p $(1)
- $$(Q) cp $(2) $(subst //,/,$(1)/$(notdir $(2)))
+ $$(Q) cp "$(YOSYS_SRC)"/$(2) $(subst //,/,$(1)/$(notdir $(2)))
endef
define add_include_file
@@ -250,10 +252,10 @@ OBJS += libs/minisat/SimpSolver.o
OBJS += libs/minisat/Solver.o
OBJS += libs/minisat/System.o
-include frontends/*/Makefile.inc
-include passes/*/Makefile.inc
-include backends/*/Makefile.inc
-include techlibs/*/Makefile.inc
+include $(YOSYS_SRC)/frontends/*/Makefile.inc
+include $(YOSYS_SRC)/passes/*/Makefile.inc
+include $(YOSYS_SRC)/backends/*/Makefile.inc
+include $(YOSYS_SRC)/techlibs/*/Makefile.inc
else
@@ -297,20 +299,22 @@ libyosys.so: $(filter-out kernel/driver.o,$(OBJS))
$(P) $(CXX) -o libyosys.so -shared -Wl,-soname,libyosys.so $(LDFLAGS) $^ $(LDLIBS)
%.o: %.cc
+ $(Q) mkdir -p $(dir $@)
$(P) $(CXX) -o $@ -c $(CXXFLAGS) $<
%.o: %.cpp
+ $(Q) mkdir -p $(dir $@)
$(P) $(CXX) -o $@ -c $(CXXFLAGS) $<
-kernel/version_$(GIT_REV).cc: Makefile
+kernel/version_$(GIT_REV).cc: $(YOSYS_SRC)/Makefile
$(P) rm -f kernel/version_*.o kernel/version_*.d kernel/version_*.cc
- $(Q) echo "namespace Yosys { extern const char *yosys_version_str; const char *yosys_version_str=\"Yosys $(YOSYS_VER) (git sha1 $(GIT_REV), $(notdir $(CXX)) ` \
+ $(Q) mkdir -p kernel && echo "namespace Yosys { extern const char *yosys_version_str; const char *yosys_version_str=\"Yosys $(YOSYS_VER) (git sha1 $(GIT_REV), $(notdir $(CXX)) ` \
$(CXX) --version | tr ' ()' '\n' | grep '^[0-9]' | head -n1` $(filter -f% -m% -O% -DNDEBUG,$(CXXFLAGS)))\"; }" > kernel/version_$(GIT_REV).cc
yosys-config: misc/yosys-config.in
- $(P) $(SED) -e 's,@CXXFLAGS@,$(subst -I"$(YOSYS_SRC)",-I"$(TARGET_DATDIR)/include",$(CXXFLAGS)),;' \
+ $(P) $(SED) -e 's,@CXXFLAGS@,$(subst -I. -I"$(YOSYS_SRC)",-I"$(TARGET_DATDIR)/include",$(CXXFLAGS)),;' \
-e 's,@CXX@,$(CXX),;' -e 's,@LDFLAGS@,$(LDFLAGS),;' -e 's,@LDLIBS@,$(LDLIBS),;' \
- -e 's,@BINDIR@,$(TARGET_BINDIR),;' -e 's,@DATDIR@,$(TARGET_DATDIR),;' < misc/yosys-config.in > yosys-config
+ -e 's,@BINDIR@,$(TARGET_BINDIR),;' -e 's,@DATDIR@,$(TARGET_DATDIR),;' < $< > yosys-config
$(Q) chmod +x yosys-config
abc/abc-$(ABCREV)$(EXE):
diff --git a/frontends/ilang/Makefile.inc b/frontends/ilang/Makefile.inc
index c15e2cc4..e2a476c9 100644
--- a/frontends/ilang/Makefile.inc
+++ b/frontends/ilang/Makefile.inc
@@ -5,13 +5,15 @@ GENFILES += frontends/ilang/ilang_parser.output
GENFILES += frontends/ilang/ilang_lexer.cc
frontends/ilang/ilang_parser.tab.cc: frontends/ilang/ilang_parser.y
- $(P) $(BISON) -d -r all -b frontends/ilang/ilang_parser frontends/ilang/ilang_parser.y
+ $(Q) mkdir -p $(dir $@)
+ $(P) $(BISON) -d -r all -b frontends/ilang/ilang_parser $<
$(Q) mv frontends/ilang/ilang_parser.tab.c frontends/ilang/ilang_parser.tab.cc
frontends/ilang/ilang_parser.tab.h: frontends/ilang/ilang_parser.tab.cc
frontends/ilang/ilang_lexer.cc: frontends/ilang/ilang_lexer.l
- $(P) flex -o frontends/ilang/ilang_lexer.cc frontends/ilang/ilang_lexer.l
+ $(Q) mkdir -p $(dir $@)
+ $(P) flex -o frontends/ilang/ilang_lexer.cc $<
OBJS += frontends/ilang/ilang_parser.tab.o frontends/ilang/ilang_lexer.o
OBJS += frontends/ilang/ilang_frontend.o
diff --git a/frontends/ilang/ilang_lexer.l b/frontends/ilang/ilang_lexer.l
index 57296403..415de74e 100644
--- a/frontends/ilang/ilang_lexer.l
+++ b/frontends/ilang/ilang_lexer.l
@@ -29,7 +29,7 @@
#pragma clang diagnostic ignored "-Wdeprecated-register"
#endif
-#include "ilang_frontend.h"
+#include "frontends/ilang/ilang_frontend.h"
#include "ilang_parser.tab.h"
USING_YOSYS_NAMESPACE
diff --git a/frontends/ilang/ilang_parser.y b/frontends/ilang/ilang_parser.y
index 2139f91f..6090fabe 100644
--- a/frontends/ilang/ilang_parser.y
+++ b/frontends/ilang/ilang_parser.y
@@ -24,7 +24,7 @@
%{
#include <list>
-#include "ilang_frontend.h"
+#include "frontends/ilang/ilang_frontend.h"
YOSYS_NAMESPACE_BEGIN
namespace ILANG_FRONTEND {
std::istream *lexin;
diff --git a/frontends/verilog/Makefile.inc b/frontends/verilog/Makefile.inc
index 92cbd0b8..a06c1d5a 100644
--- a/frontends/verilog/Makefile.inc
+++ b/frontends/verilog/Makefile.inc
@@ -5,13 +5,15 @@ GENFILES += frontends/verilog/verilog_parser.output
GENFILES += frontends/verilog/verilog_lexer.cc
frontends/verilog/verilog_parser.tab.cc: frontends/verilog/verilog_parser.y
- $(P) $(BISON) -d -r all -b frontends/verilog/verilog_parser frontends/verilog/verilog_parser.y
+ $(Q) mkdir -p $(dir $@)
+ $(P) $(BISON) -d -r all -b frontends/verilog/verilog_parser $<
$(Q) mv frontends/verilog/verilog_parser.tab.c frontends/verilog/verilog_parser.tab.cc
frontends/verilog/verilog_parser.tab.h: frontends/verilog/verilog_parser.tab.cc
frontends/verilog/verilog_lexer.cc: frontends/verilog/verilog_lexer.l
- $(P) flex -o frontends/verilog/verilog_lexer.cc frontends/verilog/verilog_lexer.l
+ $(Q) mkdir -p $(dir $@)
+ $(P) flex -o frontends/verilog/verilog_lexer.cc $<
OBJS += frontends/verilog/verilog_parser.tab.o
OBJS += frontends/verilog/verilog_lexer.o
diff --git a/frontends/verilog/verilog_lexer.l b/frontends/verilog/verilog_lexer.l
index 48039153..bd7837b3 100644
--- a/frontends/verilog/verilog_lexer.l
+++ b/frontends/verilog/verilog_lexer.l
@@ -40,7 +40,7 @@
#endif
#include "kernel/log.h"
-#include "verilog_frontend.h"
+#include "frontends/verilog/verilog_frontend.h"
#include "frontends/ast/ast.h"
#include "verilog_parser.tab.h"
diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y
index 0a6a6111..708ac762 100644
--- a/frontends/verilog/verilog_parser.y
+++ b/frontends/verilog/verilog_parser.y
@@ -36,7 +36,7 @@
%{
#include <list>
#include <string.h>
-#include "verilog_frontend.h"
+#include "frontends/verilog/verilog_frontend.h"
#include "kernel/log.h"
USING_YOSYS_NAMESPACE
diff --git a/passes/techmap/Makefile.inc b/passes/techmap/Makefile.inc
index e39d5c5c..f1c987cc 100644
--- a/passes/techmap/Makefile.inc
+++ b/passes/techmap/Makefile.inc
@@ -24,6 +24,7 @@ endif
GENFILES += passes/techmap/techmap.inc
passes/techmap/techmap.inc: techlibs/common/techmap.v
+ $(Q) mkdir -p $(dir $@)
$(P) echo "// autogenerated from $<" > $@.new
$(Q) echo "static char stdcells_code[] = {" >> $@.new
$(Q) od -v -td1 -An $< | $(SED) -e 's/[0-9][0-9]*/&,/g' >> $@.new
@@ -37,6 +38,7 @@ TARGETS += yosys-filterlib$(EXE)
EXTRA_OBJS += passes/techmap/filterlib.o
yosys-filterlib$(EXE): passes/techmap/filterlib.o
+ $(Q) mkdir -p $(dir $@)
$(P) $(CXX) -o yosys-filterlib$(EXE) $(LDFLAGS) $^ $(LDLIBS)
endif
diff --git a/techlibs/common/Makefile.inc b/techlibs/common/Makefile.inc
index d2ce61cf..f222a028 100644
--- a/techlibs/common/Makefile.inc
+++ b/techlibs/common/Makefile.inc
@@ -3,16 +3,9 @@ ifneq ($(SMALL),1)
OBJS += techlibs/common/synth.o
endif
-EXTRA_TARGETS += techlibs/common/blackbox.v
-
-techlibs/common/blackbox.v: techlibs/common/blackbox.sed techlibs/common/simlib.v techlibs/common/simcells.v
- $(P) cat techlibs/common/simlib.v techlibs/common/simcells.v | $(SED) -rf techlibs/common/blackbox.sed > techlibs/common/blackbox.v.new
- $(Q) mv techlibs/common/blackbox.v.new techlibs/common/blackbox.v
-
$(eval $(call add_share_file,share,techlibs/common/simlib.v))
$(eval $(call add_share_file,share,techlibs/common/simcells.v))
$(eval $(call add_share_file,share,techlibs/common/techmap.v))
-$(eval $(call add_share_file,share,techlibs/common/blackbox.v))
$(eval $(call add_share_file,share,techlibs/common/pmux2mux.v))
$(eval $(call add_share_file,share,techlibs/common/adff2dff.v))
$(eval $(call add_share_file,share,techlibs/common/cells.lib))
diff --git a/techlibs/common/blackbox.sed b/techlibs/common/blackbox.sed
deleted file mode 100644
index db890034..00000000
--- a/techlibs/common/blackbox.sed
+++ /dev/null
@@ -1,5 +0,0 @@
-#!/bin/sed -r
-/^(wire|assign|reg|event|integer|localparam|\/\/|[\/ ]\*| *$|`)/ d;
-/^(genvar|generate|always|initial|task|function)/,/^end/ d;
-/^endmodule/ s/$/\n/;
-s/ reg / /;
diff --git a/techlibs/ice40/Makefile.inc b/techlibs/ice40/Makefile.inc
index a9d2f236..6907f0a0 100644
--- a/techlibs/ice40/Makefile.inc
+++ b/techlibs/ice40/Makefile.inc
@@ -11,7 +11,7 @@ EXTRA_OBJS += techlibs/ice40/brams_init.mk
.SECONDARY: techlibs/ice40/brams_init.mk
techlibs/ice40/brams_init.mk: techlibs/ice40/brams_init.py
- $(P) cd techlibs/ice40 && python brams_init.py
+ $(P) cd share/ice40 && python $<
$(Q) touch techlibs/ice40/brams_init.mk
techlibs/ice40/brams_init1.vh: techlibs/ice40/brams_init.mk
@@ -23,7 +23,4 @@ $(eval $(call add_share_file,share/ice40,techlibs/ice40/cells_map.v))
$(eval $(call add_share_file,share/ice40,techlibs/ice40/cells_sim.v))
$(eval $(call add_share_file,share/ice40,techlibs/ice40/brams.txt))
$(eval $(call add_share_file,share/ice40,techlibs/ice40/brams_map.v))
-$(eval $(call add_share_file,share/ice40,techlibs/ice40/brams_init1.vh))
-$(eval $(call add_share_file,share/ice40,techlibs/ice40/brams_init2.vh))
-$(eval $(call add_share_file,share/ice40,techlibs/ice40/brams_init3.vh))
diff --git a/techlibs/xilinx/Makefile.inc b/techlibs/xilinx/Makefile.inc
index a8f5416e..c6cf1a7d 100644
--- a/techlibs/xilinx/Makefile.inc
+++ b/techlibs/xilinx/Makefile.inc
@@ -10,8 +10,8 @@ EXTRA_OBJS += techlibs/xilinx/brams_init.mk
.SECONDARY: techlibs/xilinx/brams_init.mk
techlibs/xilinx/brams_init.mk: techlibs/xilinx/brams_init.py
- $(P) cd techlibs/xilinx && python brams_init.py
- $(Q) touch techlibs/xilinx/brams_init.mk
+ $(P) cd share/xilinx && python $<
+ $(Q) touch $@
techlibs/xilinx/brams_init_36.vh: techlibs/xilinx/brams_init.mk
techlibs/xilinx/brams_init_32.vh: techlibs/xilinx/brams_init.mk
@@ -22,10 +22,6 @@ $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/cells_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/cells_sim.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams.txt))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_map.v))
-$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_init_36.vh))
-$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_init_32.vh))
-$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_init_18.vh))
-$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_init_16.vh))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_bb.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/drams.txt))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/drams_map.v))
generated by cgit v1.2.3 (git 2.25.1) at 2024-04-25 05:24:21 +0000