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-rw-r--r--backends/blif/blif.cc4
-rw-r--r--backends/edif/edif.cc2
2 files changed, 3 insertions, 3 deletions
diff --git a/backends/blif/blif.cc b/backends/blif/blif.cc
index 90d1b3fc..edb6809e 100644
--- a/backends/blif/blif.cc
+++ b/backends/blif/blif.cc
@@ -118,7 +118,7 @@ struct BlifDumper
for (auto &it : inputs) {
RTLIL::Wire *wire = it.second;
for (int i = 0; i < wire->width; i++)
- fprintf(f, " %s", cstr(RTLIL::SigSpec(wire, 1, i)));
+ fprintf(f, " %s", cstr(RTLIL::SigSpec::grml(wire, i)));
}
fprintf(f, "\n");
@@ -126,7 +126,7 @@ struct BlifDumper
for (auto &it : outputs) {
RTLIL::Wire *wire = it.second;
for (int i = 0; i < wire->width; i++)
- fprintf(f, " %s", cstr(RTLIL::SigSpec(wire, 1, i)));
+ fprintf(f, " %s", cstr(RTLIL::SigSpec::grml(wire, i)));
}
fprintf(f, "\n");
diff --git a/backends/edif/edif.cc b/backends/edif/edif.cc
index bb2b26e2..f003c750 100644
--- a/backends/edif/edif.cc
+++ b/backends/edif/edif.cc
@@ -271,7 +271,7 @@ struct EdifBackend : public Backend {
} else {
fprintf(f, " (port (array %s %d) (direction %s))\n", EDIF_DEF(wire->name), wire->width, dir);
for (int i = 0; i < wire->width; i++) {
- RTLIL::SigSpec sig = sigmap(RTLIL::SigSpec(wire, 1, i));
+ RTLIL::SigSpec sig = sigmap(RTLIL::SigSpec::grml(wire, i));
net_join_db[sig].insert(stringf("(portRef (member %s %d))", EDIF_REF(wire->name), i));
}
}