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Diffstat (limited to 'debian/control')
| -rw-r--r-- | debian/control | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/debian/control b/debian/control index a340b723..ec191219 100644 --- a/debian/control +++ b/debian/control @@ -48,3 +48,19 @@ Description: Framework for Verilog RTL synthesis Yosys can be adapted to perform any synthesis job by combining the existing passes (algorithms) using synthesis scripts and adding additional passes as needed by extending the yosys C++ code base. + +Package: yosys-doc +Section: doc +Architecture: all +Depends: ${misc:Depends} +Suggests: yosys +Description: Documentation for Yosys + Yosys is a framework for Verilog RTL synthesis. It currently has extensive + Verilog-2005 support and provides a basic set of synthesis algorithms for + various application domains. + . + Yosys can be adapted to perform any synthesis job by combining the existing + passes (algorithms) using synthesis scripts and adding additional passes as + needed by extending the yosys C++ code base. + . + This package contains the manual. |