diff options
Diffstat (limited to 'examples')
43 files changed, 1540 insertions, 12 deletions
diff --git a/examples/aiger/.gitignore b/examples/aiger/.gitignore new file mode 100644 index 00000000..3524e936 --- /dev/null +++ b/examples/aiger/.gitignore @@ -0,0 +1,5 @@ +demo.aig +demo.aim +demo.aiw +demo.smt2 +demo.vcd diff --git a/examples/aiger/README b/examples/aiger/README new file mode 100644 index 00000000..4e7694e9 --- /dev/null +++ b/examples/aiger/README @@ -0,0 +1,22 @@ +AIGER is a format for And-Inverter Graphs (AIGs). +See http://fmv.jku.at/aiger/ for details. + +AIGER is used in the Hardware Model Checking Competition (HWMCC), +therefore all solvers competing in the competition have to support +the format. + +The example in this directory is using super_prove as solver. Check +http://downloads.bvsrc.org/super_prove/ for the lates release. (See +https://bitbucket.org/sterin/super_prove_build for sources.) + +The "demo.sh" script in this directory expects a "super_prove" executable +in the PATH. E.g. extract the release to /usr/local/libexec/super_prove +and then create a /usr/local/bin/super_prove file with the following +contents (and "chmod +x" that file): + + #!/bin/bash + exec /usr/local/libexec/super_prove/bin/super_prove.sh "$@" + +The "demo.sh" script also expects the "z3" SMT2 solver in the PATH for +converting the witness file generated by super_prove to VCD using +yosys-smtbmc. See https://github.com/Z3Prover/z3 for install notes. diff --git a/examples/aiger/demo.sh b/examples/aiger/demo.sh new file mode 100644 index 00000000..8728b672 --- /dev/null +++ b/examples/aiger/demo.sh @@ -0,0 +1,14 @@ +#!/bin/bash +set -ex +yosys -p ' + read_verilog -formal demo.v + prep -flatten -nordff -top demo + write_smt2 -wires demo.smt2 + flatten demo; delete -output + memory_map; opt -full + techmap; opt -fast + abc -fast -g AND; opt_clean + write_aiger -map demo.aim demo.aig +' +super_prove demo.aig > demo.aiw +yosys-smtbmc --dump-vcd demo.vcd --aig demo demo.smt2 diff --git a/examples/aiger/demo.v b/examples/aiger/demo.v new file mode 100644 index 00000000..b9828742 --- /dev/null +++ b/examples/aiger/demo.v @@ -0,0 +1,12 @@ +module demo(input clk, reset, ctrl); + localparam NBITS = 10; + reg [NBITS-1:0] counter; + initial counter[NBITS-2] = 0; + initial counter[0] = 1; + always @(posedge clk) begin + counter <= reset ? 1 : ctrl ? counter + 1 : counter - 1; + assume(counter != 0); + assume(counter != 1 << (NBITS-1)); + assert(counter != (1 << NBITS)-1); + end +endmodule diff --git a/examples/basys3/example.xdc b/examples/basys3/example.xdc index c1fd0e92..8cdaa199 100644 --- a/examples/basys3/example.xdc +++ b/examples/basys3/example.xdc @@ -19,3 +19,6 @@ set_property -dict { IOSTANDARD LVCMOS33 PACKAGE_PIN L1 } [get_ports {LD[15]}] create_clock -add -name sys_clk_pin -period 10.00 -waveform {0 5} [get_ports CLK] +set_property CONFIG_VOLTAGE 3.3 [current_design] +set_property CFGBVS VCCO [current_design] + diff --git a/examples/basys3/run_prog.tcl b/examples/basys3/run_prog.tcl index d711af84..b078ad51 100644 --- a/examples/basys3/run_prog.tcl +++ b/examples/basys3/run_prog.tcl @@ -1,3 +1,4 @@ +open_hw connect_hw_server open_hw_target [lindex [get_hw_targets] 0] set_property PROGRAM.FILE example.bit [lindex [get_hw_devices] 0] diff --git a/examples/cmos/counter.ys b/examples/cmos/counter.ys index a784f346..d0b09366 100644 --- a/examples/cmos/counter.ys +++ b/examples/cmos/counter.ys @@ -1,11 +1,12 @@ - read_verilog counter.v read_verilog -lib cmos_cells.v -proc;; memory;; techmap;; - +synth dfflibmap -liberty cmos_cells.lib -abc -liberty cmos_cells.lib;; +abc -liberty cmos_cells.lib +opt_clean + +stat -liberty cmos_cells.lib # http://vlsiarch.ecen.okstate.edu/flows/MOSIS_SCMOS/latest/cadence/lib/tsmc025/signalstorm/osu025_stdcells.lib # dfflibmap -liberty osu025_stdcells.lib @@ -13,4 +14,3 @@ abc -liberty cmos_cells.lib;; write_verilog synth.v write_spice synth.sp - diff --git a/examples/cmos/counter_tb.v b/examples/cmos/counter_tb.v index bcd7d992..11e82507 100644 --- a/examples/cmos/counter_tb.v +++ b/examples/cmos/counter_tb.v @@ -12,7 +12,7 @@ module counter_tb; # 4 reset = 0; # 6 $finish; end - + /* Make enable with period of 8 and 6,7 low */ reg en = 1; always begin @@ -25,7 +25,7 @@ module counter_tb; /* Make a regular pulsing clock. */ reg clk = 0; always #1 clk = !clk; - + /* UUT */ wire [2:0] count; counter c1 (clk, reset, en, count); diff --git a/examples/cmos/testbench_digital.sh b/examples/cmos/testbench_digital.sh index afaaf4d4..d7ab0fe1 100644 --- a/examples/cmos/testbench_digital.sh +++ b/examples/cmos/testbench_digital.sh @@ -4,7 +4,7 @@ set -ex # iverlog simulation echo "Doing Verilog simulation with iverilog" -iverilog -o counter_tb counter.v counter_tb.v +iverilog -o counter_tb counter.v counter_tb.v ./counter_tb; gtkwave counter_tb.gtkw & # yosys synthesis diff --git a/examples/cxx-api/evaldemo.cc b/examples/cxx-api/evaldemo.cc index e5cc8d8e..34373487 100644 --- a/examples/cxx-api/evaldemo.cc +++ b/examples/cxx-api/evaldemo.cc @@ -22,7 +22,7 @@ struct EvalDemoPass : public Pass { EvalDemoPass() : Pass("evaldemo") { } - virtual void execute(vector<string>, Design *design) + void execute(vector<string>, Design *design) YS_OVERRIDE { Module *module = design->top_module(); diff --git a/examples/gowin/.gitignore b/examples/gowin/.gitignore new file mode 100644 index 00000000..71030bdb --- /dev/null +++ b/examples/gowin/.gitignore @@ -0,0 +1,8 @@ +demo.bit +demo.out +demo.rpt +demo_syn.v +demo_out.v +demo_tr.html +testbench +testbench.vcd diff --git a/examples/gowin/README b/examples/gowin/README new file mode 100644 index 00000000..0194e9f0 --- /dev/null +++ b/examples/gowin/README @@ -0,0 +1,17 @@ +Simple test project for Gowinsemi GW2A-55K Eval Board Mini. + +Follow the install instructions for the Gowinsemi tools below, +then run "bash run.sh" in this directory. + + +Install instructions for gowinTool_linux +---------------------------------------- + +1.) extract gowinTool_linux.zip + +2.) set GOWIN_HOME env variable to the full path to the +gowinTool_linux directory + +3.) edit gowinTool_linux/bin/gwlicense.ini. Set lic="..." to +the full path to the license file. + diff --git a/examples/gowin/demo.cst b/examples/gowin/demo.cst new file mode 100644 index 00000000..22d7eb66 --- /dev/null +++ b/examples/gowin/demo.cst @@ -0,0 +1,41 @@ +// 50 MHz Clock +IO_LOC "clk" D11; + +// LEDs +IO_LOC "leds[0]" D22; +IO_LOC "leds[1]" E22; +IO_LOC "leds[2]" G22; +IO_LOC "leds[3]" J22; +IO_LOC "leds[4]" L22; +IO_LOC "leds[5]" L19; +IO_LOC "leds[6]" L20; +IO_LOC "leds[7]" M21; +IO_LOC "leds[8]" N19; +IO_LOC "leds[9]" R19; +IO_LOC "leds[10]" T18; +IO_LOC "leds[11]" AA22; +IO_LOC "leds[12]" U18; +IO_LOC "leds[13]" V20; +IO_LOC "leds[14]" AA21; +IO_LOC "leds[15]" AB21; + + +// 7-Segment Display +IO_LOC "seg7dig[0]" E20; +IO_LOC "seg7dig[1]" G18; +IO_LOC "seg7dig[2]" G20; +IO_LOC "seg7dig[3]" F21; +IO_LOC "seg7dig[4]" J20; +IO_LOC "seg7dig[5]" H21; +IO_LOC "seg7dig[6]" H18; +IO_LOC "seg7dig[7]" D20; +IO_LOC "seg7sel[0]" C19; +IO_LOC "seg7sel[1]" B22; +IO_LOC "seg7sel[2]" C20; +IO_LOC "seg7sel[3]" C21; + +// Switches +IO_LOC "sw[0]" AB20; +IO_LOC "sw[1]" AB19; +IO_LOC "sw[2]" AB18; +IO_LOC "sw[3]" AB17; diff --git a/examples/gowin/demo.sdc b/examples/gowin/demo.sdc new file mode 100644 index 00000000..6c90325f --- /dev/null +++ b/examples/gowin/demo.sdc @@ -0,0 +1 @@ +create_clock -name clk -period 20 -waveform {0 10} [get_ports {clk}] diff --git a/examples/gowin/demo.v b/examples/gowin/demo.v new file mode 100644 index 00000000..6ea10838 --- /dev/null +++ b/examples/gowin/demo.v @@ -0,0 +1,12 @@ +module demo ( + input clk, + input [3:0] sw, + output [15:0] leds, + output [7:0] seg7dig, + output [3:0] seg7sel +); + localparam PRESCALE = 20; + reg [PRESCALE+3:0] counter = 0; + always @(posedge clk) counter <= counter + 1; + assign leds = 1 << counter[PRESCALE +: 4]; +endmodule diff --git a/examples/gowin/run.sh b/examples/gowin/run.sh new file mode 100644 index 00000000..33a7b5c3 --- /dev/null +++ b/examples/gowin/run.sh @@ -0,0 +1,12 @@ +#!/bin/bash +set -ex +yosys -p "synth_gowin -top demo -vout demo_syn.v" demo.v +$GOWIN_HOME/bin/gowin -d demo_syn.v -cst demo.cst -sdc demo.sdc -p GW2A55-PBGA484-6 \ + -warning_all -out demo_out.v -rpt demo.rpt -tr demo_tr.html -bit demo.bit + +# post place&route simulation (icarus verilog) +if false; then + iverilog -D POST_IMPL -o testbench -s testbench testbench.v \ + demo_out.v $(yosys-config --datdir/gowin/cells_sim.v) + vvp -N testbench +fi diff --git a/examples/gowin/testbench.v b/examples/gowin/testbench.v new file mode 100644 index 00000000..6d206381 --- /dev/null +++ b/examples/gowin/testbench.v @@ -0,0 +1,40 @@ +module testbench; + reg clk; + + initial begin + #5 clk = 0; + forever #5 clk = ~clk; + end + + wire [15:0] leds; + + initial begin + // $dumpfile("testbench.vcd"); + // $dumpvars(0, testbench); + $monitor("%b", leds); + end + + demo uut ( + .clk (clk ), +`ifdef POST_IMPL + .\leds[0] (leds[0]), + .\leds[1] (leds[1]), + .\leds[2] (leds[2]), + .\leds[3] (leds[3]), + .\leds[4] (leds[4]), + .\leds[5] (leds[5]), + .\leds[6] (leds[6]), + .\leds[7] (leds[7]), + .\leds[8] (leds[8]), + .\leds[9] (leds[9]), + .\leds[10] (leds[10]), + .\leds[11] (leds[11]), + .\leds[12] (leds[12]), + .\leds[13] (leds[13]), + .\leds[14] (leds[14]), + .\leds[15] (leds[15]) +`else + .leds(leds) +`endif + ); +endmodule diff --git a/examples/intel/DE2i-150/quartus_compile/de2i.qpf b/examples/intel/DE2i-150/quartus_compile/de2i.qpf new file mode 100644 index 00000000..9fc734eb --- /dev/null +++ b/examples/intel/DE2i-150/quartus_compile/de2i.qpf @@ -0,0 +1,4 @@ +QUARTUS_VERSION = "16.1" +# Revisions + +PROJECT_REVISION = "de2i" diff --git a/examples/intel/DE2i-150/quartus_compile/de2i.qsf b/examples/intel/DE2i-150/quartus_compile/de2i.qsf new file mode 100644 index 00000000..5a230155 --- /dev/null +++ b/examples/intel/DE2i-150/quartus_compile/de2i.qsf @@ -0,0 +1,1099 @@ +set_global_assignment -name FAMILY "Cyclone IV GX" +set_global_assignment -name DEVICE EP4CGX150DF31C7 +set_global_assignment -name TOP_LEVEL_ENTITY "top" +set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA + + +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLOCK2_50 +set_instance_assignment -name IO_STANDARD "2.5 V" -to CLOCK3_50 +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLOCK_50 + +#============================================================ +# DRAM +#============================================================ +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[0] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[1] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[2] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[3] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[4] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[5] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[6] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[7] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[8] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[9] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[10] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[11] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[12] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_BA[0] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_BA[1] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_CAS_N +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_CKE +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_CLK +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_CS_N +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[0] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[1] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[2] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[3] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[4] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[5] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[6] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[7] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[8] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[9] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[10] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[11] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[12] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[13] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[14] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[15] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[16] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[17] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[18] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[19] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[20] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[21] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[22] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[23] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[24] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[25] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[26] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[27] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[28] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[29] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[30] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[31] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQM[0] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQM[1] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQM[2] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQM[3] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_RAS_N +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_WE_N + +#============================================================ +# EEP +#============================================================ +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to EEP_I2C_SCLK +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to EEP_I2C_SDAT + +#============================================================ +# ENET +#============================================================ +set_instance_assignment -name IO_STANDARD "2.5 V" -to ENET_GTX_CLK +set_instance_assignment -name IO_STANDARD "2.5 V" -to ENET_INT_N +set_instance_assignment -name IO_STANDARD "2.5 V" -to ENET_LINK100 +set_instance_assignment -name IO_STANDARD "2.5 V" -to ENET_MDC +set_instance_assignment -name IO_STANDARD "2.5 V" -to ENET_MDIO +set_instance_assignment -name IO_STANDARD "2.5 V" -to ENET_RST_N +set_instance_assignment -name IO_STANDARD "2.5 V" -to ENET_RX_CLK +set_instance_assignment -name IO_STANDARD "2.5 V" -to ENET_RX_COL +set_instance_assignment -name IO_STANDARD "2.5 V" -to ENET_RX_CRS +set_instance_assignment -name IO_STANDARD "2.5 V" -to ENET_RX_DATA[0] +set_instance_assignment -name IO_STANDARD "2.5 V" -to ENET_RX_DATA[1] +set_instance_assignment -name IO_STANDARD "2.5 V" -to ENET_RX_DATA[2] +set_instance_assignment -name IO_STANDARD "2.5 V" -to ENET_RX_DATA[3] +set_instance_assignment -name IO_STANDARD "2.5 V" -to ENET_RX_DV +set_instance_assignment -name IO_STANDARD "2.5 V" -to ENET_RX_ER +set_instance_assignment -name IO_STANDARD "2.5 V" -to ENET_TX_CLK +set_instance_assignment -name IO_STANDARD "2.5 V" -to ENET_TX_DATA[0] +set_instance_assignment -name IO_STANDARD "2.5 V" -to ENET_TX_DATA[1] +set_instance_assignment -name IO_STANDARD "2.5 V" -to ENET_TX_DATA[2] +set_instance_assignment -name IO_STANDARD "2.5 V" -to ENET_TX_DATA[3] +set_instance_assignment -name IO_STANDARD "2.5 V" -to ENET_TX_EN +set_instance_assignment -name IO_STANDARD "2.5 V" -to ENET_TX_ER + +#============================================================ +# FAN +#============================================================ +set_instance_assignment -name IO_STANDARD "2.5 V" -to FAN_CTRL + +#============================================================ +# FLASH +#============================================================ +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FL_RESET_N + +#============================================================ +# FS +#============================================================ +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_ADDR[1] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_ADDR[2] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_ADDR[3] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_ADDR[4] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_ADDR[5] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_ADDR[6] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_ADDR[7] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_ADDR[8] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_ADDR[9] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_ADDR[10] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_ADDR[11] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_ADDR[12] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_ADDR[13] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_ADDR[14] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_ADDR[15] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_ADDR[16] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_ADDR[17] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_ADDR[18] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_ADDR[19] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_ADDR[20] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_ADDR[21] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_ADDR[22] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_ADDR[23] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_ADDR[24] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_ADDR[25] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_ADDR[26] + +#============================================================ +# FL +#============================================================ +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FL_CE_N +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FL_OE_N +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FL_RY +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FL_WE_N +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FL_WP_N + +#============================================================ +# FS +#============================================================ +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[0] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[1] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[2] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[3] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[4] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[5] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[6] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[7] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[8] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[9] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[10] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[11] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[12] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[13] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[14] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[15] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[16] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[17] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[18] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[19] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[20] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[21] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[22] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[23] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[24] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[25] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[26] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[27] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[28] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[29] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[30] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FS_DQ[31] + +#============================================================ +# GPIO +#============================================================ +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[0] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[1] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[2] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[3] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[4] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[5] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[6] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[7] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[8] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[9] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[10] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[11] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[12] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[13] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[14] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[15] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[16] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[17] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[18] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[19] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[20] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[21] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[22] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[23] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[24] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[25] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[26] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[27] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[28] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[29] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[30] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[31] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[32] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[33] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[34] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[35] + +#============================================================ +# G +#============================================================ +set_instance_assignment -name IO_STANDARD "2.5 V" -to G_SENSOR_INT1 +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to G_SENSOR_SCLK +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to G_SENSOR_SDAT + +#============================================================ +# HEX0 +#============================================================ +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX0[0] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX0[1] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX0[2] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX0[3] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX0[4] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX0[5] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX0[6] + +#============================================================ +# HEX1 +#============================================================ +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX1[0] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX1[1] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX1[2] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX1[3] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX1[4] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX1[5] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX1[6] + +#============================================================ +# HEX2 +#============================================================ +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX2[0] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX2[1] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX2[2] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX2[3] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX2[4] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX2[5] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX2[6] + +#============================================================ +# HEX3 +#============================================================ +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX3[0] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX3[1] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX3[2] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX3[3] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX3[4] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX3[5] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX3[6] + +#============================================================ +# HEX4 +#============================================================ +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX4[0] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX4[1] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX4[2] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX4[3] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX4[4] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX4[5] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX4[6] + +#============================================================ +# HEX5 +#============================================================ +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX5[0] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX5[1] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX5[2] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX5[3] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX5[4] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX5[5] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX5[6] + +#============================================================ +# HEX6 +#============================================================ +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX6[0] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX6[1] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX6[2] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX6[3] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX6[4] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX6[5] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX6[6] + +#============================================================ +# HEX7 +#============================================================ +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX7[0] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX7[1] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX7[2] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX7[3] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX7[4] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX7[5] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HEX7[6] + +#============================================================ +# HSMC +#============================================================ +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_CLKIN0 +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_CLKIN_N1 +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_CLKIN_N2 +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_CLKIN_P1 +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_CLKIN_P2 +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_CLKOUT0 +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_CLKOUT_N1 +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_CLKOUT_N2 +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_CLKOUT_P1 +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_CLKOUT_P2 +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_D[0] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_D[1] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_D[2] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_D[3] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_I2C_SCLK +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_I2C_SDAT +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_N[0] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_N[1] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_N[2] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_N[3] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_N[4] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_N[5] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_N[6] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_N[7] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_N[8] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_N[9] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_N[10] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_N[11] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_N[12] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_N[13] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_N[14] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_N[15] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_N[16] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_P[0] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_P[1] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_P[2] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_P[3] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_P[4] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_P[5] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_P[6] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_P[7] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_P[8] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_P[9] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_P[10] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_P[11] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_P[12] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_P[13] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_P[14] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_P[15] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_RX_D_P[16] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_N[0] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_N[1] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_N[2] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_N[3] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_N[4] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_N[5] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_N[6] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_N[7] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_N[8] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_N[9] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_N[10] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_N[11] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_N[12] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_N[13] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_N[14] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_N[15] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_N[16] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_P[0] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_P[1] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_P[2] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_P[3] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_P[4] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_P[5] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_P[6] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_P[7] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_P[8] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_P[9] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_P[10] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_P[11] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_P[12] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_P[13] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_P[14] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_P[15] +set_instance_assignment -name IO_STANDARD "2.5 V" -to HSMC_TX_D_P[16] + +#============================================================ +# I2C +#============================================================ +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to I2C_SCLK +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to I2C_SDAT + +#============================================================ +# IRDA +#============================================================ +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to IRDA_RXD + +#============================================================ +# KEY +#============================================================ +set_instance_assignment -name IO_STANDARD "2.5 V" -to KEY[0] +set_instance_assignment -name IO_STANDARD "2.5 V" -to KEY[1] +set_instance_assignment -name IO_STANDARD "2.5 V" -to KEY[2] +set_instance_assignment -name IO_STANDARD "2.5 V" -to KEY[3] + +#============================================================ +# LCD +#============================================================ +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LCD_DATA[0] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LCD_DATA[1] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LCD_DATA[2] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LCD_DATA[3] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LCD_DATA[4] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LCD_DATA[5] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LCD_DATA[6] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LCD_DATA[7] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LCD_EN +set_instance_assignment -name IO_STANDARD "2.5 V" -to LCD_ON +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LCD_RS +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LCD_RW + +#============================================================ +# LEDG +#============================================================ +set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDG[0] +set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDG[1] +set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDG[2] +set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDG[3] +set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDG[4] +set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDG[5] +set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDG[6] +set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDG[7] +set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDG[8] + +#============================================================ +# LEDR +#============================================================ +set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDR[0] +set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDR[1] +set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDR[2] +set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDR[3] +set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDR[4] +set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDR[5] +set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDR[6] +set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDR[7] +set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDR[8] +set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDR[9] +set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDR[10] +set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDR[11] +set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDR[12] +set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDR[13] +set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDR[14] +set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDR[15] +set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDR[16] +set_instance_assignment -name IO_STANDARD "2.5 V" -to LEDR[17] + +#============================================================ +# PCIE +#============================================================ +set_instance_assignment -name IO_STANDARD "2.5 V" -to PCIE_PERST_N +set_instance_assignment -name IO_STANDARD HCSL -to PCIE_REFCLK_P +set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_RX_P[0] +set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_RX_P[1] +set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_TX_P[0] +set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to PCIE_TX_P[1] +set_instance_assignment -name IO_STANDARD "2.5 V" -to PCIE_WAKE_N + +#============================================================ +# SD +#============================================================ +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SD_CLK +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SD_CMD +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SD_DAT[0] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SD_DAT[1] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SD_DAT[2] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SD_DAT[3] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SD_WP_N + +#============================================================ +# SMA +#============================================================ +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SMA_CLKIN +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SMA_CLKOUT + +#============================================================ +# SSRAM0 +#============================================================ +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SSRAM0_CE_N + +#============================================================ +# SSRAM1 +#============================================================ +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SSRAM1_CE_N + +#============================================================ +# SSRAM +#============================================================ +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SSRAM_ADSC_N +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SSRAM_ADSP_N +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SSRAM_ADV_N +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SSRAM_BE[0] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SSRAM_BE[1] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SSRAM_BE[2] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SSRAM_BE[3] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SSRAM_CLK +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SSRAM_GW_N +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SSRAM_OE_N +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SSRAM_WE_N + +#============================================================ +# SW +#============================================================ +set_instance_assignment -name IO_STANDARD "2.5 V" -to SW[0] +set_instance_assignment -name IO_STANDARD "2.5 V" -to SW[1] +set_instance_assignment -name IO_STANDARD "2.5 V" -to SW[2] +set_instance_assignment -name IO_STANDARD "2.5 V" -to SW[3] +set_instance_assignment -name IO_STANDARD "2.5 V" -to SW[4] +set_instance_assignment -name IO_STANDARD "2.5 V" -to SW[5] +set_instance_assignment -name IO_STANDARD "2.5 V" -to SW[6] +set_instance_assignment -name IO_STANDARD "2.5 V" -to SW[7] +set_instance_assignment -name IO_STANDARD "2.5 V" -to SW[8] +set_instance_assignment -name IO_STANDARD "2.5 V" -to SW[9] +set_instance_assignment -name IO_STANDARD "2.5 V" -to SW[10] +set_instance_assignment -name IO_STANDARD "2.5 V" -to SW[11] +set_instance_assignment -name IO_STANDARD "2.5 V" -to SW[12] +set_instance_assignment -name IO_STANDARD "2.5 V" -to SW[13] +set_instance_assignment -name IO_STANDARD "2.5 V" -to SW[14] +set_instance_assignment -name IO_STANDARD "2.5 V" -to SW[15] +set_instance_assignment -name IO_STANDARD "2.5 V" -to SW[16] +set_instance_assignment -name IO_STANDARD "2.5 V" -to SW[17] + +#============================================================ +# TD +#============================================================ +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_CLK27 +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_DATA[0] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_DATA[1] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_DATA[2] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_DATA[3] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_DATA[4] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_DATA[5] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_DATA[6] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_DATA[7] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_HS +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_RESET_N +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TD_VS + +#============================================================ +# UART +#============================================================ +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to UART_CTS +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to UART_RTS +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to UART_RXD +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to UART_TXD + +#============================================================ +# VGA +#============================================================ +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[0] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[1] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[2] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[3] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[4] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[5] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[6] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[7] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_BLANK_N +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_CLK +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[0] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[1] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[2] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[3] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[4] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[5] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[6] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[7] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_HS +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[0] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[1] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[2] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[3] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[4] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[5] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[6] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[7] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_SYNC_N +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_VS + +#============================================================ +# End of pin assignments by Terasic System Builder +#============================================================ + + + +set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO" +set_location_assignment PIN_A15 -to CLOCK2_50 +set_location_assignment PIN_V11 -to CLOCK3_50 +set_location_assignment PIN_AJ16 -to CLOCK_50 +set_location_assignment PIN_AG7 -to DRAM_ADDR[0] +set_location_assignment PIN_AJ7 -to DRAM_ADDR[1] +set_location_assignment PIN_AG8 -to DRAM_ADDR[2] +set_location_assignment PIN_AH8 -to DRAM_ADDR[3] +set_location_assignment PIN_AE16 -to DRAM_ADDR[4] +set_location_assignment PIN_AF16 -to DRAM_ADDR[5] +set_location_assignment PIN_AE14 -to DRAM_ADDR[6] +set_location_assignment PIN_AE15 -to DRAM_ADDR[7] +set_location_assignment PIN_AE13 -to DRAM_ADDR[8] +set_location_assignment PIN_AE12 -to DRAM_ADDR[9] +set_location_assignment PIN_AH6 -to DRAM_ADDR[10] +set_location_assignment PIN_AE11 -to DRAM_ADDR[11] +set_location_assignment PIN_AE10 -to DRAM_ADDR[12] +set_location_assignment PIN_AH5 -to DRAM_BA[0] +set_location_assignment PIN_AG6 -to DRAM_BA[1] +set_location_assignment PIN_AJ4 -to DRAM_CAS_N +set_location_assignment PIN_AD6 -to DRAM_CKE +set_location_assignment PIN_AE6 -to DRAM_CLK +set_location_assignment PIN_AG5 -to DRAM_CS_N +set_location_assignment PIN_AD10 -to DRAM_DQ[0] +set_location_assignment PIN_AD9 -to DRAM_DQ[1] +set_location_assignment PIN_AE9 -to DRAM_DQ[2] +set_location_assignment PIN_AE8 -to DRAM_DQ[3] +set_location_assignment PIN_AE7 -to DRAM_DQ[4] +set_location_assignment PIN_AF7 -to DRAM_DQ[5] +set_location_assignment PIN_AF6 -to DRAM_DQ[6] +set_location_assignment PIN_AF9 -to DRAM_DQ[7] +set_location_assignment PIN_AB13 -to DRAM_DQ[8] +set_location_assignment PIN_AF13 -to DRAM_DQ[9] +set_location_assignment PIN_AF12 -to DRAM_DQ[10] +set_location_assignment PIN_AG9 -to DRAM_DQ[11] +set_location_assignment PIN_AA13 -to DRAM_DQ[12] +set_location_assignment PIN_AB11 -to DRAM_DQ[13] +set_location_assignment PIN_AA12 -to DRAM_DQ[14] +set_location_assignment PIN_AA15 -to DRAM_DQ[15] +set_location_assignment PIN_AH11 -to DRAM_DQ[16] +set_location_assignment PIN_AG11 -to DRAM_DQ[17] +set_location_assignment PIN_AH12 -to DRAM_DQ[18] +set_location_assignment PIN_AG12 -to DRAM_DQ[19] +set_location_assignment PIN_AH13 -to DRAM_DQ[20] +set_location_assignment PIN_AG13 -to DRAM_DQ[21] +set_location_assignment PIN_AG14 -to DRAM_DQ[22] +set_location_assignment PIN_AH14 -to DRAM_DQ[23] +set_location_assignment PIN_AH9 -to DRAM_DQ[24] +set_location_assignment PIN_AK8 -to DRAM_DQ[25] +set_location_assignment PIN_AG10 -to DRAM_DQ[26] +set_location_assignment PIN_AK7 -to DRAM_DQ[27] +set_location_assignment PIN_AH7 -to DRAM_DQ[28] +set_location_assignment PIN_AK6 -to DRAM_DQ[29] +set_location_assignment PIN_AJ6 -to DRAM_DQ[30] +set_location_assignment PIN_AK5 -to DRAM_DQ[31] +set_location_assignment PIN_AF10 -to DRAM_DQM[0] +set_location_assignment PIN_AB14 -to DRAM_DQM[1] +set_location_assignment PIN_AH15 -to DRAM_DQM[2] +set_location_assignment PIN_AH10 -to DRAM_DQM[3] +set_location_assignment PIN_AK4 -to DRAM_RAS_N +set_location_assignment PIN_AK3 -to DRAM_WE_N +set_location_assignment PIN_AG27 -to EEP_I2C_SCLK +set_location_assignment PIN_AG25 -to EEP_I2C_SDAT +set_location_assignment PIN_A12 -to ENET_GTX_CLK +set_location_assignment PIN_E16 -to ENET_INT_N +set_location_assignment PIN_F5 -to ENET_LINK100 +set_location_assignment PIN_C16 -to ENET_MDC +set_location_assignment PIN_C15 -to ENET_MDIO +set_location_assignment PIN_C14 -to ENET_RST_N +set_location_assignment PIN_L15 -to ENET_RX_CLK +set_location_assignment PIN_G15 -to ENET_RX_COL +set_location_assignment PIN_D6 -to ENET_RX_CRS +set_location_assignment PIN_F15 -to ENET_RX_DATA[0] +set_location_assignment PIN_E13 -to ENET_RX_DATA[1] +set_location_assignment PIN_A5 -to ENET_RX_DATA[2] +set_location_assignment PIN_B7 -to ENET_RX_DATA[3] +set_location_assignment PIN_A8 -to ENET_RX_DV +set_location_assignment PIN_D11 -to ENET_RX_ER +set_location_assignment PIN_F13 -to ENET_TX_CLK +set_location_assignment PIN_B12 -to ENET_TX_DATA[0] +set_location_assignment PIN_E7 -to ENET_TX_DATA[1] +set_location_assignment PIN_C13 -to ENET_TX_DATA[2] +set_location_assignment PIN_D15 -to ENET_TX_DATA[3] +set_location_assignment PIN_D14 -to ENET_TX_EN +set_location_assignment PIN_D13 -to ENET_TX_ER +set_location_assignment PIN_AF28 -to FAN_CTRL +set_location_assignment PIN_AG18 -to FL_RESET_N +set_location_assignment PIN_AB22 -to FS_ADDR[1] +set_location_assignment PIN_AH19 -to FS_ADDR[2] +set_location_assignment PIN_AK19 -to FS_ADDR[3] +set_location_assignment PIN_AJ18 -to FS_ADDR[4] +set_location_assignment PIN_AA18 -to FS_ADDR[5] +set_location_assignment PIN_AH18 -to FS_ADDR[6] +set_location_assignment PIN_AK17 -to FS_ADDR[7] +set_location_assignment PIN_Y20 -to FS_ADDR[8] +set_location_assignment PIN_AK21 -to FS_ADDR[9] +set_location_assignment PIN_AH21 -to FS_ADDR[10] +set_location_assignment PIN_AG21 -to FS_ADDR[11] +set_location_assignment PIN_AG22 -to FS_ADDR[12] +set_location_assignment PIN_AD22 -to FS_ADDR[13] +set_location_assignment PIN_AE24 -to FS_ADDR[14] +set_location_assignment PIN_AD23 -to FS_ADDR[15] +set_location_assignment PIN_AB21 -to FS_ADDR[16] +set_location_assignment PIN_AH17 -to FS_ADDR[17] +set_location_assignment PIN_AE17 -to FS_ADDR[18] +set_location_assignment PIN_AG20 -to FS_ADDR[19] +set_location_assignment PIN_AK20 -to FS_ADDR[20] +set_location_assignment PIN_AE19 -to FS_ADDR[21] +set_location_assignment PIN_AA16 -to FS_ADDR[22] +set_location_assignment PIN_AF15 -to FS_ADDR[23] +set_location_assignment PIN_AG15 -to FS_ADDR[24] +set_location_assignment PIN_Y17 -to FS_ADDR[25] +set_location_assignment PIN_AB16 -to FS_ADDR[26] +set_location_assignment PIN_AG19 -to FL_CE_N +set_location_assignment PIN_AJ19 -to FL_OE_N +set_location_assignment PIN_AF19 -to FL_RY +set_location_assignment PIN_AG17 -to FL_WE_N +set_location_assignment PIN_AK18 -to FL_WP_N +set_location_assignment PIN_AK29 -to FS_DQ[0] +set_location_assignment PIN_AE23 -to FS_DQ[1] +set_location_assignment PIN_AH24 -to FS_DQ[2] +set_location_assignment PIN_AH23 -to FS_DQ[3] +set_location_assignment PIN_AA21 -to FS_DQ[4] +set_location_assignment PIN_AE20 -to FS_DQ[5] +set_location_assignment PIN_Y19 -to FS_DQ[6] +set_location_assignment PIN_AA17 -to FS_DQ[7] +set_location_assignment PIN_AB17 -to FS_DQ[8] +set_location_assignment PIN_Y18 -to FS_DQ[9] +set_location_assignment PIN_AA20 -to FS_DQ[10] +set_location_assignment PIN_AE21 -to FS_DQ[11] +set_location_assignment PIN_AH22 -to FS_DQ[12] +set_location_assignment PIN_AJ24 -to FS_DQ[13] +set_location_assignment PIN_AE22 -to FS_DQ[14] +set_location_assignment PIN_AK28 -to FS_DQ[15] +set_location_assignment PIN_AK9 -to FS_DQ[16] +set_location_assignment PIN_AJ10 -to FS_DQ[17] +set_location_assignment PIN_AK11 -to FS_DQ[18] +set_location_assignment PIN_AK12 -to FS_DQ[19] +set_location_assignment PIN_AJ13 -to FS_DQ[20] +set_location_assignment PIN_AK15 -to FS_DQ[21] +set_location_assignment PIN_AC16 -to FS_DQ[22] +set_location_assignment PIN_AH16 -to FS_DQ[23] +set_location_assignment PIN_AG16 -to FS_DQ[24] +set_location_assignment PIN_AD16 -to FS_DQ[25] +set_location_assignment PIN_AJ15 -to FS_DQ[26] +set_location_assignment PIN_AK14 -to FS_DQ[27] +set_location_assignment PIN_AK13 -to FS_DQ[28] +set_location_assignment PIN_AJ12 -to FS_DQ[29] +set_location_assignment PIN_AK10 -to FS_DQ[30] +set_location_assignment PIN_AJ9 -to FS_DQ[31] +set_location_assignment PIN_G16 -to GPIO[0] +set_location_assignment PIN_F17 -to GPIO[1] +set_location_assignment PIN_D18 -to GPIO[2] +set_location_assignment PIN_F18 -to GPIO[3] +set_location_assignment PIN_D19 -to GPIO[4] +set_location_assignment PIN_K21 -to GPIO[5] +set_location_assignment PIN_F19 -to GPIO[6] +set_location_assignment PIN_K22 -to GPIO[7] +set_location_assignment PIN_B21 -to GPIO[8] +set_location_assignment PIN_C21 -to GPIO[9] +set_location_assignment PIN_D22 -to GPIO[10] +set_location_assignment PIN_D21 -to GPIO[11] +set_location_assignment PIN_D23 -to GPIO[12] +set_location_assignment PIN_D24 -to GPIO[13] +set_location_assignment PIN_B28 -to GPIO[14] +set_location_assignment PIN_C25 -to GPIO[15] +set_location_assignment PIN_C26 -to GPIO[16] +set_location_assignment PIN_D28 -to GPIO[17] +set_location_assignment PIN_D25 -to GPIO[18] +set_location_assignment PIN_F20 -to GPIO[19] +set_location_assignment PIN_E21 -to GPIO[20] +set_location_assignment PIN_F23 -to GPIO[21] +set_location_assignment PIN_G20 -to GPIO[22] +set_location_assignment PIN_F22 -to GPIO[23] +set_location_assignment PIN_G22 -to GPIO[24] +set_location_assignment PIN_G24 -to GPIO[25] +set_location_assignment PIN_G23 -to GPIO[26] +set_location_assignment PIN_A25 -to GPIO[27] +set_location_assignment PIN_A26 -to GPIO[28] +set_location_assignment PIN_A19 -to GPIO[29] +set_location_assignment PIN_A28 -to GPIO[30] +set_location_assignment PIN_A27 -to GPIO[31] +set_location_assignment PIN_B30 -to GPIO[32] +set_location_assignment PIN_AG28 -to GPIO[33] +set_location_assignment PIN_AG26 -to GPIO[34] +set_location_assignment PIN_Y21 -to GPIO[35] +set_location_assignment PIN_AC30 -to G_SENSOR_INT1 +set_location_assignment PIN_AK27 -to G_SENSOR_SCLK +set_location_assignment PIN_AK26 -to G_SENSOR_SDAT +set_location_assignment PIN_E15 -to HEX0[0] +set_location_assignment PIN_E12 -to HEX0[1] +set_location_assignment PIN_G11 -to HEX0[2] +set_location_assignment PIN_F11 -to HEX0[3] +set_location_assignment PIN_F16 -to HEX0[4] +set_location_assignment PIN_D16 -to HEX0[5] +set_location_assignment PIN_F14 -to HEX0[6] +set_location_assignment PIN_G14 -to HEX1[0] +set_location_assignment PIN_B13 -to HEX1[1] +set_location_assignment PIN_G13 -to HEX1[2] +set_location_assignment PIN_F12 -to HEX1[3] +set_location_assignment PIN_G12 -to HEX1[4] +set_location_assignment PIN_J9 -to HEX1[5] +set_location_assignment PIN_G10 -to HEX1[6] +set_location_assignment PIN_G8 -to HEX2[0] +set_location_assignment PIN_G7 -to HEX2[1] +set_location_assignment PIN_F7 -to HEX2[2] +set_location_assignment PIN_AG30 -to HEX2[3] +set_location_assignment PIN_F6 -to HEX2[4] +set_location_assignment PIN_F4 -to HEX2[5] +set_location_assignment PIN_F10 -to HEX2[6] +set_location_assignment PIN_D10 -to HEX3[0] +set_location_assignment PIN_D7 -to HEX3[1] +set_location_assignment PIN_E6 -to HEX3[2] +set_location_assignment PIN_E4 -to HEX3[3] +set_location_assignment PIN_E3 -to HEX3[4] +set_location_assignment PIN_D5 -to HEX3[5] +set_location_assignment PIN_D4 -to HEX3[6] +set_location_assignment PIN_A14 -to HEX4[0] +set_location_assignment PIN_A13 -to HEX4[1] +set_location_assignment PIN_C7 -to HEX4[2] +set_location_assignment PIN_C6 -to HEX4[3] +set_location_assignment PIN_C5 -to HEX4[4] +set_location_assignment PIN_C4 -to HEX4[5] +set_location_assignment PIN_C3 -to HEX4[6] +set_location_assignment PIN_D3 -to HEX5[0] +set_location_assignment PIN_A10 -to HEX5[1] +set_location_assignment PIN_A9 -to HEX5[2] +set_location_assignment PIN_A7 -to HEX5[3] +set_location_assignment PIN_A6 -to HEX5[4] +set_location_assignment PIN_A11 -to HEX5[5] +set_location_assignment PIN_B6 -to HEX5[6] +set_location_assignment PIN_B9 -to HEX6[0] +set_location_assignment PIN_B10 -to HEX6[1] +set_location_assignment PIN_C8 -to HEX6[2] +set_location_assignment PIN_C9 -to HEX6[3] +set_location_assignment PIN_D8 -to HEX6[4] +set_location_assignment PIN_D9 -to HEX6[5] +set_location_assignment PIN_E9 -to HEX6[6] +set_location_assignment PIN_E10 -to HEX7[0] +set_location_assignment PIN_F8 -to HEX7[1] +set_location_assignment PIN_F9 -to HEX7[2] +set_location_assignment PIN_C10 -to HEX7[3] +set_location_assignment PIN_C11 -to HEX7[4] +set_location_assignment PIN_C12 -to HEX7[5] +set_location_assignment PIN_D12 -to HEX7[6] +set_location_assignment PIN_K15 -to HSMC_CLKIN0 +set_location_assignment PIN_V30 -to HSMC_CLKIN_N1 +set_location_assignment PIN_T30 -to HSMC_CLKIN_N2 +set_location_assignment PIN_V29 -to HSMC_CLKIN_P1 +set_location_assignment PIN_T29 -to HSMC_CLKIN_P2 +set_location_assignment PIN_G6 -to HSMC_CLKOUT0 +set_location_assignment PIN_AB28 -to HSMC_CLKOUT_N1 +set_location_assignment PIN_Y28 -to HSMC_CLKOUT_N2 +set_location_assignment PIN_AB27 -to HSMC_CLKOUT_P1 +set_location_assignment PIN_AA28 -to HSMC_CLKOUT_P2 +set_location_assignment PIN_AC25 -to HSMC_D[0] +set_location_assignment PIN_E27 -to HSMC_D[1] +set_location_assignment PIN_AB26 -to HSMC_D[2] +set_location_assignment PIN_E28 -to HSMC_D[3] +set_location_assignment PIN_AD26 -to HSMC_I2C_SCLK +set_location_assignment PIN_AD25 -to HSMC_I2C_SDAT +set_location_assignment PIN_G27 -to HSMC_RX_D_N[0] +set_location_assignment PIN_G29 -to HSMC_RX_D_N[1] +set_location_assignment PIN_H27 -to HSMC_RX_D_N[2] +set_location_assignment PIN_K29 -to HSMC_RX_D_N[3] +set_location_assignment PIN_L28 -to HSMC_RX_D_N[4] +set_location_assignment PIN_M28 -to HSMC_RX_D_N[5] +set_location_assignment PIN_N30 -to HSMC_RX_D_N[6] +set_location_assignment PIN_P28 -to HSMC_RX_D_N[7] +set_location_assignment PIN_R28 -to HSMC_RX_D_N[8] +set_location_assignment PIN_U28 -to HSMC_RX_D_N[9] +set_location_assignment PIN_W28 -to HSMC_RX_D_N[10] +set_location_assignment PIN_W30 -to HSMC_RX_D_N[11] +set_location_assignment PIN_M30 -to HSMC_RX_D_N[12] +set_location_assignment PIN_Y27 -to HSMC_RX_D_N[13] +set_location_assignment PIN_AA29 -to HSMC_RX_D_N[14] +set_location_assignment PIN_AD28 -to HSMC_RX_D_N[15] +set_location_assignment PIN_AE28 -to HSMC_RX_D_N[16] +set_location_assignment PIN_G26 -to HSMC_RX_D_P[0] +set_location_assignment PIN_G28 -to HSMC_RX_D_P[1] +set_location_assignment PIN_J27 -to HSMC_RX_D_P[2] +set_location_assignment PIN_K28 -to HSMC_RX_D_P[3] +set_location_assignment PIN_L27 -to HSMC_RX_D_P[4] +set_location_assignment PIN_M27 -to HSMC_RX_D_P[5] +set_location_assignment PIN_N29 -to HSMC_RX_D_P[6] +set_location_assignment PIN_P27 -to HSMC_RX_D_P[7] +set_location_assignment PIN_R27 -to HSMC_RX_D_P[8] +set_location_assignment PIN_U27 -to HSMC_RX_D_P[9] +set_location_assignment PIN_W27 -to HSMC_RX_D_P[10] +set_location_assignment PIN_W29 -to HSMC_RX_D_P[11] +set_location_assignment PIN_M29 -to HSMC_RX_D_P[12] +set_location_assignment PIN_AA27 -to HSMC_RX_D_P[13] +set_location_assignment PIN_AB29 -to HSMC_RX_D_P[14] +set_location_assignment PIN_AD27 -to HSMC_RX_D_P[15] +set_location_assignment PIN_AE27 -to HSMC_RX_D_P[16] +set_location_assignment PIN_H28 -to HSMC_TX_D_N[0] +set_location_assignment PIN_F29 -to HSMC_TX_D_N[1] +set_location_assignment PIN_D30 -to HSMC_TX_D_N[2] +set_location_assignment PIN_E30 -to HSMC_TX_D_N[3] +set_location_assignment PIN_G30 -to HSMC_TX_D_N[4] +set_location_assignment PIN_J30 -to HSMC_TX_D_N[5] +set_location_assignment PIN_K27 -to HSMC_TX_D_N[6] +set_location_assignment PIN_K30 -to HSMC_TX_D_N[7] +set_location_assignment PIN_T25 -to HSMC_TX_D_N[8] +set_location_assignment PIN_N28 -to HSMC_TX_D_N[9] +set_location_assignment PIN_V26 -to HSMC_TX_D_N[10] +set_location_assignment PIN_Y30 -to HSMC_TX_D_N[11] +set_location_assignment PIN_AC28 -to HSMC_TX_D_N[12] +set_location_assignment PIN_AD30 -to HSMC_TX_D_N[13] +set_location_assignment PIN_AE30 -to HSMC_TX_D_N[14] +set_location_assignment PIN_AH30 -to HSMC_TX_D_N[15] +set_location_assignment PIN_AG29 -to HSMC_TX_D_N[16] +set_location_assignment PIN_J28 -to HSMC_TX_D_P[0] +set_location_assignment PIN_F28 -to HSMC_TX_D_P[1] +set_location_assignment PIN_D29 -to HSMC_TX_D_P[2] +set_location_assignment PIN_F30 -to HSMC_TX_D_P[3] +set_location_assignment PIN_H30 -to HSMC_TX_D_P[4] +set_location_assignment PIN_J29 -to HSMC_TX_D_P[5] +set_location_assignment PIN_K26 -to HSMC_TX_D_P[6] +set_location_assignment PIN_L30 -to HSMC_TX_D_P[7] +set_location_assignment PIN_U25 -to HSMC_TX_D_P[8] +set_location_assignment PIN_N27 -to HSMC_TX_D_P[9] +set_location_assignment PIN_V25 -to HSMC_TX_D_P[10] +set_location_assignment PIN_AA30 -to HSMC_TX_D_P[11] +set_location_assignment PIN_AC27 -to HSMC_TX_D_P[12] +set_location_assignment PIN_AD29 -to HSMC_TX_D_P[13] +set_location_assignment PIN_AE29 -to HSMC_TX_D_P[14] +set_location_assignment PIN_AJ30 -to HSMC_TX_D_P[15] +set_location_assignment PIN_AH29 -to HSMC_TX_D_P[16] +set_location_assignment PIN_C27 -to I2C_SCLK +set_location_assignment PIN_G21 -to I2C_SDAT +set_location_assignment PIN_AH28 -to IRDA_RXD +set_location_assignment PIN_AA26 -to KEY[0] +set_location_assignment PIN_AE25 -to KEY[1] +set_location_assignment PIN_AF30 -to KEY[2] +set_location_assignment PIN_AE26 -to KEY[3] +set_location_assignment PIN_AG4 -to LCD_DATA[0] +set_location_assignment PIN_AF3 -to LCD_DATA[1] +set_location_assignment PIN_AH3 -to LCD_DATA[2] +set_location_assignment PIN_AE5 -to LCD_DATA[3] +set_location_assignment PIN_AH2 -to LCD_DATA[4] +set_location_assignment PIN_AE3 -to LCD_DATA[5] +set_location_assignment PIN_AH4 -to LCD_DATA[6] +set_location_assignment PIN_AE4 -to LCD_DATA[7] +set_location_assignment PIN_AF4 -to LCD_EN +set_location_assignment PIN_AF27 -to LCD_ON +set_location_assignment PIN_AG3 -to LCD_RS +set_location_assignment PIN_AJ3 -to LCD_RW +set_location_assignment PIN_AA25 -to LEDG[0] +set_location_assignment PIN_AB25 -to LEDG[1] +set_location_assignment PIN_F27 -to LEDG[2] +set_location_assignment PIN_F26 -to LEDG[3] +set_location_assignment PIN_W26 -to LEDG[4] +set_location_assignment PIN_Y22 -to LEDG[5] +set_location_assignment PIN_Y25 -to LEDG[6] +set_location_assignment PIN_AA22 -to LEDG[7] +set_location_assignment PIN_J25 -to LEDG[8] +set_location_assignment PIN_T23 -to LEDR[0] +set_location_assignment PIN_T24 -to LEDR[1] +set_location_assignment PIN_V27 -to LEDR[2] +set_location_assignment PIN_W25 -to LEDR[3] +set_location_assignment PIN_T21 -to LEDR[4] +set_location_assignment PIN_T26 -to LEDR[5] +set_location_assignment PIN_R25 -to LEDR[6] +set_location_assignment PIN_T27 -to LEDR[7] +set_location_assignment PIN_P25 -to LEDR[8] +set_location_assignment PIN_R24 -to LEDR[9] +set_location_assignment PIN_P21 -to LEDR[10] +set_location_assignment PIN_N24 -to LEDR[11] +set_location_assignment PIN_N21 -to LEDR[12] +set_location_assignment PIN_M25 -to LEDR[13] +set_location_assignment PIN_K24 -to LEDR[14] +set_location_assignment PIN_L25 -to LEDR[15] +set_location_assignment PIN_M21 -to LEDR[16] +set_location_assignment PIN_M22 -to LEDR[17] +set_location_assignment PIN_A4 -to PCIE_PERST_N +set_location_assignment PIN_V15 -to PCIE_REFCLK_P +set_location_assignment PIN_AC2 -to PCIE_RX_P[0] +set_location_assignment PIN_AA2 -to PCIE_RX_P[1] +set_location_assignment PIN_AB4 -to PCIE_TX_P[0] +set_location_assignment PIN_Y4 -to PCIE_TX_P[1] +set_location_assignment PIN_C29 -to PCIE_WAKE_N +set_location_assignment PIN_AH25 -to SD_CLK +set_location_assignment PIN_AF18 -to SD_CMD +set_location_assignment PIN_AH27 -to SD_DAT[0] +set_location_assignment PIN_AJ28 -to SD_DAT[1] +set_location_assignment PIN_AD24 -to SD_DAT[2] +set_location_assignment PIN_AE18 -to SD_DAT[3] +set_location_assignment PIN_AJ27 -to SD_WP_N +set_location_assignment PIN_AK16 -to SMA_CLKIN +set_location_assignment PIN_AF25 -to SMA_CLKOUT +set_location_assignment PIN_AJ21 -to SSRAM0_CE_N +set_location_assignment PIN_AG23 -to SSRAM1_CE_N +set_location_assignment PIN_AK25 -to SSRAM_ADSC_N +set_location_assignment PIN_AJ25 -to SSRAM_ADSP_N +set_location_assignment PIN_AH26 -to SSRAM_ADV_N +set_location_assignment PIN_AF22 -to SSRAM_BE[0] +set_location_assignment PIN_AK22 -to SSRAM_BE[1] +set_location_assignment PIN_AJ22 -to SSRAM_BE[2] +set_location_assignment PIN_AF21 -to SSRAM_BE[3] +set_location_assignment PIN_AF24 -to SSRAM_CLK +set_location_assignment PIN_AK23 -to SSRAM_GW_N +set_location_assignment PIN_AG24 -to SSRAM_OE_N +set_location_assignment PIN_AK24 -to SSRAM_WE_N +set_location_assignment PIN_V28 -to SW[0] +set_location_assignment PIN_U30 -to SW[1] +set_location_assignment PIN_V21 -to SW[2] +set_location_assignment PIN_C2 -to SW[3] +set_location_assignment PIN_AB30 -to SW[4] +set_location_assignment PIN_U21 -to SW[5] +set_location_assignment PIN_T28 -to SW[6] +set_location_assignment PIN_R30 -to SW[7] +set_location_assignment PIN_P30 -to SW[8] +set_location_assignment PIN_R29 -to SW[9] +set_location_assignment PIN_R26 -to SW[10] +set_location_assignment PIN_N26 -to SW[11] +set_location_assignment PIN_M26 -to SW[12] +set_location_assignment PIN_N25 -to SW[13] +set_location_assignment PIN_J26 -to SW[14] +set_location_assignment PIN_K25 -to SW[15] +set_location_assignment PIN_C30 -to SW[16] +set_location_assignment PIN_H25 -to SW[17] +set_location_assignment PIN_B15 -to TD_CLK27 +set_location_assignment PIN_C17 -to TD_DATA[0] +set_location_assignment PIN_D17 -to TD_DATA[1] +set_location_assignment PIN_A16 -to TD_DATA[2] +set_location_assignment PIN_B16 -to TD_DATA[3] +set_location_assignment PIN_G18 -to TD_DATA[4] +set_location_assignment PIN_G17 -to TD_DATA[5] +set_location_assignment PIN_K18 -to TD_DATA[6] +set_location_assignment PIN_K17 -to TD_DATA[7] +set_location_assignment PIN_C28 -to TD_HS +set_location_assignment PIN_E25 -to TD_RESET_N +set_location_assignment PIN_E22 -to TD_VS +set_location_assignment PIN_D26 -to UART_CTS +set_location_assignment PIN_A29 -to UART_RTS +set_location_assignment PIN_B27 -to UART_RXD +set_location_assignment PIN_H24 -to UART_TXD +set_location_assignment PIN_E24 -to VGA_B[0] +set_location_assignment PIN_C24 -to VGA_B[1] +set_location_assignment PIN_B25 -to VGA_B[2] +set_location_assignment PIN_C23 -to VGA_B[3] +set_location_assignment PIN_F24 -to VGA_B[4] +set_location_assignment PIN_A23 -to VGA_B[5] +set_location_assignment PIN_G25 -to VGA_B[6] +set_location_assignment PIN_C22 -to VGA_B[7] +set_location_assignment PIN_F25 -to VGA_BLANK_N +set_location_assignment PIN_D27 -to VGA_CLK +set_location_assignment PIN_D20 -to VGA_G[0] +set_location_assignment PIN_C20 -to VGA_G[1] +set_location_assignment PIN_A20 -to VGA_G[2] +set_location_assignment PIN_K19 -to VGA_G[3] +set_location_assignment PIN_A21 -to VGA_G[4] +set_location_assignment PIN_F21 -to VGA_G[5] +set_location_assignment PIN_A22 -to VGA_G[6] +set_location_assignment PIN_B22 -to VGA_G[7] +set_location_assignment PIN_B24 -to VGA_HS +set_location_assignment PIN_A17 -to VGA_R[0] +set_location_assignment PIN_C18 -to VGA_R[1] +set_location_assignment PIN_B18 -to VGA_R[2] +set_location_assignment PIN_A18 -to VGA_R[3] +set_location_assignment PIN_E18 -to VGA_R[4] +set_location_assignment PIN_E19 -to VGA_R[5] +set_location_assignment PIN_B19 -to VGA_R[6] +set_location_assignment PIN_C19 -to VGA_R[7] +set_location_assignment PIN_AH20 -to VGA_SYNC_N +set_location_assignment PIN_A24 -to VGA_VS +set_instance_assignment -name VIRTUAL_PIN ON -to FS_ADDR[0] +#============================================================ +set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top +set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top +set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top +set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V" +set_global_assignment -name VQM_FILE ../top.vqm +set_global_assignment -name SDC_FILE de2i_150_golden_top.sdc +set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 +set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 +set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW" +set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)" +set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
\ No newline at end of file diff --git a/examples/intel/DE2i-150/quartus_compile/runme_quartus b/examples/intel/DE2i-150/quartus_compile/runme_quartus new file mode 100644 index 00000000..83aa3b60 --- /dev/null +++ b/examples/intel/DE2i-150/quartus_compile/runme_quartus @@ -0,0 +1,7 @@ +#!/bin/bash + +export REV="de2i" + +quartus_map -c $REV top && \ + quartus_fit -c $REV top && \ + quartus_asm -c $REV top diff --git a/examples/intel/DE2i-150/run_cycloneiv b/examples/intel/DE2i-150/run_cycloneiv new file mode 100644 index 00000000..518807b5 --- /dev/null +++ b/examples/intel/DE2i-150/run_cycloneiv @@ -0,0 +1,2 @@ +#/bin/env bash +yosys -p "synth_intel -family cycloneiv -top top -vqm top.vqm" top.v sevenseg.v diff --git a/examples/intel/DE2i-150/sevenseg.v b/examples/intel/DE2i-150/sevenseg.v new file mode 100644 index 00000000..06cf7c14 --- /dev/null +++ b/examples/intel/DE2i-150/sevenseg.v @@ -0,0 +1,25 @@ +module sevenseg ( output reg [6:0] HEX0, + input [3:0] SW ); + + always @(*) begin + case(SW) + 4'h1: HEX0 = 7'b1111001; + 4'h2: HEX0 = 7'b0100100; + 4'h3: HEX0 = 7'b0110000; + 4'h4: HEX0 = 7'b0011001; + 4'h5: HEX0 = 7'b0010010; + 4'h6: HEX0 = 7'b0000010; + 4'h7: HEX0 = 7'b1111000; + 4'h8: HEX0 = 7'b0000000; + 4'h9: HEX0 = 7'b0011000; + 4'ha: HEX0 = 7'b0001000; + 4'hb: HEX0 = 7'b0000011; + 4'hc: HEX0 = 7'b1000110; + 4'hd: HEX0 = 7'b0100001; + 4'he: HEX0 = 7'b0000110; + 4'hf: HEX0 = 7'b0001110; + 4'h0: HEX0 = 7'b1000000; + endcase // case (SW) + end + +endmodule diff --git a/examples/intel/DE2i-150/top.v b/examples/intel/DE2i-150/top.v new file mode 100644 index 00000000..2bada0e2 --- /dev/null +++ b/examples/intel/DE2i-150/top.v @@ -0,0 +1,15 @@ +`default_nettype none +module top ( output wire [6:0] HEX0, HEX1, HEX2, HEX3, HEX4, HEX5, HEX6, HEX7, + input wire [15:0] SW ); + + + sevenseg UUD0 (.HEX0(HEX0), .SW(4'h7)); + sevenseg UUD1 (.HEX0(HEX1), .SW(4'h1)); + sevenseg UUD2 (.HEX0(HEX2), .SW(4'h0)); + sevenseg UUD3 (.HEX0(HEX3), .SW(4'h2)); + sevenseg UUD4 (.HEX0(HEX4), .SW(SW[3:0])); + sevenseg UUD5 (.HEX0(HEX5), .SW(SW[7:4])); + sevenseg UUD6 (.HEX0(HEX6), .SW(SW[11:8])); + sevenseg UUD7 (.HEX0(HEX7), .SW(SW[15:12])); + +endmodule diff --git a/examples/intel/MAX10/run_max10 b/examples/intel/MAX10/run_max10 new file mode 100644 index 00000000..0378e4fa --- /dev/null +++ b/examples/intel/MAX10/run_max10 @@ -0,0 +1 @@ +yosys -p "synth_intel -family max10 -top top -vqm top.vqm" top.v sevenseg.v diff --git a/examples/intel/MAX10/runme_postsynth b/examples/intel/MAX10/runme_postsynth new file mode 100644 index 00000000..f1621054 --- /dev/null +++ b/examples/intel/MAX10/runme_postsynth @@ -0,0 +1,5 @@ +#!/bin/bash + +iverilog -D POST_IMPL -o verif_post -s tb_top tb_top.v top.vqm $(yosys-config --datdir/altera_intel/max10/cells_comb_max10.v) +vvp -N verif_post + diff --git a/examples/intel/MAX10/sevenseg.v b/examples/intel/MAX10/sevenseg.v new file mode 100644 index 00000000..06cf7c14 --- /dev/null +++ b/examples/intel/MAX10/sevenseg.v @@ -0,0 +1,25 @@ +module sevenseg ( output reg [6:0] HEX0, + input [3:0] SW ); + + always @(*) begin + case(SW) + 4'h1: HEX0 = 7'b1111001; + 4'h2: HEX0 = 7'b0100100; + 4'h3: HEX0 = 7'b0110000; + 4'h4: HEX0 = 7'b0011001; + 4'h5: HEX0 = 7'b0010010; + 4'h6: HEX0 = 7'b0000010; + 4'h7: HEX0 = 7'b1111000; + 4'h8: HEX0 = 7'b0000000; + 4'h9: HEX0 = 7'b0011000; + 4'ha: HEX0 = 7'b0001000; + 4'hb: HEX0 = 7'b0000011; + 4'hc: HEX0 = 7'b1000110; + 4'hd: HEX0 = 7'b0100001; + 4'he: HEX0 = 7'b0000110; + 4'hf: HEX0 = 7'b0001110; + 4'h0: HEX0 = 7'b1000000; + endcase // case (SW) + end + +endmodule diff --git a/examples/intel/MAX10/top.v b/examples/intel/MAX10/top.v new file mode 100644 index 00000000..2bada0e2 --- /dev/null +++ b/examples/intel/MAX10/top.v @@ -0,0 +1,15 @@ +`default_nettype none +module top ( output wire [6:0] HEX0, HEX1, HEX2, HEX3, HEX4, HEX5, HEX6, HEX7, + input wire [15:0] SW ); + + + sevenseg UUD0 (.HEX0(HEX0), .SW(4'h7)); + sevenseg UUD1 (.HEX0(HEX1), .SW(4'h1)); + sevenseg UUD2 (.HEX0(HEX2), .SW(4'h0)); + sevenseg UUD3 (.HEX0(HEX3), .SW(4'h2)); + sevenseg UUD4 (.HEX0(HEX4), .SW(SW[3:0])); + sevenseg UUD5 (.HEX0(HEX5), .SW(SW[7:4])); + sevenseg UUD6 (.HEX0(HEX6), .SW(SW[11:8])); + sevenseg UUD7 (.HEX0(HEX7), .SW(SW[15:12])); + +endmodule diff --git a/examples/intel/asicworld_lfsr/README b/examples/intel/asicworld_lfsr/README new file mode 100644 index 00000000..ba365fab --- /dev/null +++ b/examples/intel/asicworld_lfsr/README @@ -0,0 +1,6 @@ +Source of the files: +http://www.asic-world.com/examples/verilog/lfsr.html + +Run first: runme_presynth +Generate output netlist with run_max10 or run_cycloneiv +Then, check with: runme_postsynth diff --git a/examples/intel/asicworld_lfsr/lfsr_updown.v b/examples/intel/asicworld_lfsr/lfsr_updown.v new file mode 100644 index 00000000..43db1606 --- /dev/null +++ b/examples/intel/asicworld_lfsr/lfsr_updown.v @@ -0,0 +1,35 @@ +`default_nettype none +module lfsr_updown ( +clk , // Clock input +reset , // Reset input +enable , // Enable input +up_down , // Up Down input +count , // Count output +overflow // Overflow output +); + + input clk; + input reset; + input enable; + input up_down; + + output [7 : 0] count; + output overflow; + + reg [7 : 0] count; + + assign overflow = (up_down) ? (count == {{7{1'b0}}, 1'b1}) : + (count == {1'b1, {7{1'b0}}}) ; + + always @(posedge clk) + if (reset) + count <= {7{1'b0}}; + else if (enable) begin + if (up_down) begin + count <= {~(^(count & 8'b01100011)),count[7:1]}; + end else begin + count <= {count[5:0],~(^(count & 8'b10110001))}; + end + end + +endmodule diff --git a/examples/intel/asicworld_lfsr/lfsr_updown_tb.v b/examples/intel/asicworld_lfsr/lfsr_updown_tb.v new file mode 100644 index 00000000..db29e60f --- /dev/null +++ b/examples/intel/asicworld_lfsr/lfsr_updown_tb.v @@ -0,0 +1,34 @@ +module tb(); + reg clk; + reg reset; + reg enable; + reg up_down; + + wire [7 : 0] count; + wire overflow; + +initial begin + $monitor("rst %b en %b updown %b cnt %b overflow %b", + reset,enable,up_down,count, overflow); + clk = 0; + reset = 1; + enable = 0; + up_down = 0; + #10 reset = 0; + #1 enable = 1; + #20 up_down = 1; + #30 $finish; +end + +always #1 clk = ~clk; + +lfsr_updown U( +.clk ( clk ), +.reset ( reset ), +.enable ( enable ), +.up_down ( up_down ), +.count ( count ), +.overflow ( overflow ) +); + +endmodule diff --git a/examples/intel/asicworld_lfsr/run_cycloneiv b/examples/intel/asicworld_lfsr/run_cycloneiv new file mode 100755 index 00000000..c7498bde --- /dev/null +++ b/examples/intel/asicworld_lfsr/run_cycloneiv @@ -0,0 +1,2 @@ +#!/bin/env bash +yosys -p "synth_intel -family cycloneiv -top lfsr_updown -vqm top.vqm" lfsr_updown.v diff --git a/examples/intel/asicworld_lfsr/run_max10 b/examples/intel/asicworld_lfsr/run_max10 new file mode 100755 index 00000000..b75d552b --- /dev/null +++ b/examples/intel/asicworld_lfsr/run_max10 @@ -0,0 +1,2 @@ +#!/bin/env bash +yosys -p "synth_intel -family max10 -top lfsr_updown -vqm top.vqm" lfsr_updown.v diff --git a/examples/intel/asicworld_lfsr/runme_postsynth b/examples/intel/asicworld_lfsr/runme_postsynth new file mode 100755 index 00000000..c3b26b03 --- /dev/null +++ b/examples/intel/asicworld_lfsr/runme_postsynth @@ -0,0 +1,5 @@ +#!/bin/bash + +iverilog -D POST_IMPL -o verif_post -s tb lfsr_updown_tb.v top.vqm $(yosys-config --datdir/altera_intel/max10/cells_comb_max10.v) +vvp -N verif_post + diff --git a/examples/intel/asicworld_lfsr/runme_presynth b/examples/intel/asicworld_lfsr/runme_presynth new file mode 100755 index 00000000..51118bb4 --- /dev/null +++ b/examples/intel/asicworld_lfsr/runme_presynth @@ -0,0 +1,5 @@ +#!/bin/bash + +iverilog -o presynth lfsr_updown_tb.v lfsr_updown.v &&\ + +vvp -N presynth
\ No newline at end of file diff --git a/examples/osu035/.gitignore b/examples/osu035/.gitignore new file mode 100644 index 00000000..3abf340b --- /dev/null +++ b/examples/osu035/.gitignore @@ -0,0 +1,3 @@ +osu035_stdcells.lib +example.yslog +example.edif diff --git a/examples/osu035/Makefile b/examples/osu035/Makefile new file mode 100644 index 00000000..2bb8162b --- /dev/null +++ b/examples/osu035/Makefile @@ -0,0 +1,13 @@ + +example.edif: example.ys example.v example.constr osu035_stdcells.lib + yosys -l example.yslog -q example.ys + +osu035_stdcells.lib: + rm -f osu035_stdcells.lib.part osu035_stdcells.lib + wget -O osu035_stdcells.lib.part https://vlsiarch.ecen.okstate.edu/flows/MOSIS_SCMOS/latest/cadence/lib/ami035/signalstorm/osu035_stdcells.lib + mv osu035_stdcells.lib.part osu035_stdcells.lib + +clean: + rm -f osu035_stdcells.lib + rm -f example.yslog example.edif + diff --git a/examples/osu035/example.constr b/examples/osu035/example.constr new file mode 100644 index 00000000..eb2c6e8d --- /dev/null +++ b/examples/osu035/example.constr @@ -0,0 +1,2 @@ +set_driving_cell INVX1 +set_load 0.015 diff --git a/examples/osu035/example.v b/examples/osu035/example.v new file mode 100644 index 00000000..0f043e5f --- /dev/null +++ b/examples/osu035/example.v @@ -0,0 +1,3 @@ +module top (input clk, input [7:0] a, b, output reg [15:0] c); + always @(posedge clk) c <= a * b; +endmodule diff --git a/examples/osu035/example.ys b/examples/osu035/example.ys new file mode 100644 index 00000000..6821ef42 --- /dev/null +++ b/examples/osu035/example.ys @@ -0,0 +1,11 @@ +read_verilog example.v +read_liberty -lib osu035_stdcells.lib + +synth -top top + +dfflibmap -liberty osu035_stdcells.lib +abc -D 10000 -constr example.constr -liberty osu035_stdcells.lib +opt_clean + +stat -liberty osu035_stdcells.lib +write_edif example.edif diff --git a/examples/smtbmc/.gitignore b/examples/smtbmc/.gitignore index a3f4f0f2..278f5ebf 100644 --- a/examples/smtbmc/.gitignore +++ b/examples/smtbmc/.gitignore @@ -20,3 +20,5 @@ demo6.smt2 demo6.yslog demo7.smt2 demo7.yslog +demo8.smt2 +demo8.yslog diff --git a/examples/smtbmc/Makefile b/examples/smtbmc/Makefile index 2f7060bd..96fa058d 100644 --- a/examples/smtbmc/Makefile +++ b/examples/smtbmc/Makefile @@ -1,5 +1,5 @@ -all: demo1 demo2 demo3 demo4 demo5 demo6 demo7 +all: demo1 demo2 demo3 demo4 demo5 demo6 demo7 demo8 demo1: demo1.smt2 yosys-smtbmc --dump-vcd demo1.vcd demo1.smt2 @@ -25,6 +25,9 @@ demo6: demo6.smt2 demo7: demo7.smt2 yosys-smtbmc -t 10 demo7.smt2 +demo8: demo8.smt2 + yosys-smtbmc -s z3 -t 1 -g demo8.smt2 + demo1.smt2: demo1.v yosys -ql demo1.yslog -p 'read_verilog -formal demo1.v; prep -top demo1 -nordff; write_smt2 -wires demo1.smt2' @@ -46,6 +49,9 @@ demo6.smt2: demo6.v demo7.smt2: demo7.v yosys -ql demo7.yslog -p 'read_verilog -formal demo7.v; prep -top demo7 -nordff; write_smt2 -wires demo7.smt2' +demo8.smt2: demo8.v + yosys -ql demo8.yslog -p 'read_verilog -formal demo8.v; prep -top demo8 -nordff; write_smt2 -stbv -wires demo8.smt2' + clean: rm -f demo1.yslog demo1.smt2 demo1.vcd rm -f demo2.yslog demo2.smt2 demo2.vcd demo2.smtc demo2_tb.v demo2_tb demo2_tb.vcd @@ -54,6 +60,7 @@ clean: rm -f demo5.yslog demo5.smt2 demo5.vcd rm -f demo6.yslog demo6.smt2 rm -f demo7.yslog demo7.smt2 + rm -f demo8.yslog demo8.smt2 -.PHONY: demo1 demo2 demo3 demo4 demo5 demo6 demo7 clean +.PHONY: demo1 demo2 demo3 demo4 demo5 demo6 demo7 demo8 clean diff --git a/examples/smtbmc/demo2.v b/examples/smtbmc/demo2.v index 34745e89..0cf529a4 100644 --- a/examples/smtbmc/demo2.v +++ b/examples/smtbmc/demo2.v @@ -9,7 +9,7 @@ module demo2(input clk, input [4:0] addr, output reg [31:0] data); reg [31:0] mem [0:31]; - always @(posedge clk) + always @(negedge clk) data <= mem[addr]; reg [31:0] used_addr = 0; diff --git a/examples/smtbmc/demo8.v b/examples/smtbmc/demo8.v new file mode 100644 index 00000000..c4c396cd --- /dev/null +++ b/examples/smtbmc/demo8.v @@ -0,0 +1,12 @@ +// Simple exists-forall demo + +module demo8; + wire [7:0] prime = $anyconst; + wire [3:0] factor = $allconst; + + always @* begin + if (1 < factor && factor < prime) + assume((prime % factor) != 0); + assume(prime > 1); + end +endmodule |