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-rw-r--r--manual/PRESENTATION_ExSyn/memory_02.v27
1 files changed, 27 insertions, 0 deletions
diff --git a/manual/PRESENTATION_ExSyn/memory_02.v b/manual/PRESENTATION_ExSyn/memory_02.v
new file mode 100644
index 00000000..dbe86ed1
--- /dev/null
+++ b/manual/PRESENTATION_ExSyn/memory_02.v
@@ -0,0 +1,27 @@
+module test(
+ input WR1_CLK, WR2_CLK,
+ input WR1_WEN, WR2_WEN,
+ input [7:0] WR1_ADDR, WR2_ADDR,
+ input [7:0] WR1_DATA, WR2_DATA,
+ input RD1_CLK, RD2_CLK,
+ input [7:0] RD1_ADDR, RD2_ADDR,
+ output reg [7:0] RD1_DATA, RD2_DATA
+);
+
+reg [7:0] memory [0:255];
+
+always @(posedge WR1_CLK)
+ if (WR1_WEN)
+ memory[WR1_ADDR] <= WR1_DATA;
+
+always @(posedge WR2_CLK)
+ if (WR2_WEN)
+ memory[WR2_ADDR] <= WR2_DATA;
+
+always @(posedge RD1_CLK)
+ RD1_DATA <= memory[RD1_ADDR];
+
+always @(posedge RD2_CLK)
+ RD2_DATA <= memory[RD2_ADDR];
+
+endmodule