diff options
Diffstat (limited to 'passes/cmds')
-rw-r--r-- | passes/cmds/setundef.cc | 1 | ||||
-rw-r--r-- | passes/cmds/show.cc | 3 | ||||
-rw-r--r-- | passes/cmds/splice.cc | 2 | ||||
-rw-r--r-- | passes/cmds/splitnets.cc | 2 |
4 files changed, 1 insertions, 7 deletions
diff --git a/passes/cmds/setundef.cc b/passes/cmds/setundef.cc index 63d5bb9a..6c4bb16c 100644 --- a/passes/cmds/setundef.cc +++ b/passes/cmds/setundef.cc @@ -144,7 +144,6 @@ struct SetundefPass : public Pass { RTLIL::SigSpec bits; for (int i = 0; i < c.width; i++) bits.append(worker.next_bit()); - bits.optimize(); module->connections.push_back(RTLIL::SigSig(c, bits)); } } diff --git a/passes/cmds/show.cc b/passes/cmds/show.cc index 37fe4404..6b37b7bb 100644 --- a/passes/cmds/show.cc +++ b/passes/cmds/show.cc @@ -171,8 +171,6 @@ struct ShowWorker std::string gen_signode_simple(RTLIL::SigSpec sig, bool range_check = true) { - sig.optimize(); - if (sig.chunks().size() == 0) { fprintf(f, "v%d [ label=\"\" ];\n", single_idx_count); return stringf("v%d", single_idx_count++); @@ -199,7 +197,6 @@ struct ShowWorker if (net.empty()) { std::string label_string; - sig.optimize(); int pos = sig.size()-1; int idx = single_idx_count++; for (int i = int(sig.chunks().size())-1; i >= 0; i--) { diff --git a/passes/cmds/splice.cc b/passes/cmds/splice.cc index aed9c076..68e8951f 100644 --- a/passes/cmds/splice.cc +++ b/passes/cmds/splice.cc @@ -82,7 +82,6 @@ struct SpliceWorker module->add(cell); } - new_sig.optimize(); sliced_signals_cache[sig] = new_sig; return new_sig; @@ -143,7 +142,6 @@ struct SpliceWorker module->add(cell); } - new_sig.optimize(); spliced_signals_cache[sig] = new_sig; log(" Created spliced signal: %s -> %s\n", log_signal(sig), log_signal(new_sig)); diff --git a/passes/cmds/splitnets.cc b/passes/cmds/splitnets.cc index c40ff2c4..c65b6a5f 100644 --- a/passes/cmds/splitnets.cc +++ b/passes/cmds/splitnets.cc @@ -141,7 +141,7 @@ struct SplitnetsPass : public Pass { if (!ct.cell_output(c.second->type, p.first)) continue; - RTLIL::SigSpec sig = p.second.optimized(); + RTLIL::SigSpec sig = p.second; for (auto &chunk : sig.chunks()) { if (chunk.wire == NULL) continue; |