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-rw-r--r--passes/sat/example.ys2
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/sat/example.ys b/passes/sat/example.ys
index b7798ab2..e2eb1749 100644
--- a/passes/sat/example.ys
+++ b/passes/sat/example.ys
@@ -1,3 +1,3 @@
read_verilog example.v
-techmap; opt
+techmap; opt; abc; opt
sat_solve -show a -set y 1'b1