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-rw-r--r--passes/hierarchy/hierarchy.cc2
-rw-r--r--passes/techmap/techmap.cc2
2 files changed, 2 insertions, 2 deletions
diff --git a/passes/hierarchy/hierarchy.cc b/passes/hierarchy/hierarchy.cc
index d9b52c6d..291df184 100644
--- a/passes/hierarchy/hierarchy.cc
+++ b/passes/hierarchy/hierarchy.cc
@@ -150,7 +150,7 @@ static bool expand_module(RTLIL::Design *design, RTLIL::Module *module, bool fla
if (design->modules.at(cell->type)->get_bool_attribute("\\blackbox"))
continue;
RTLIL::Module *mod = design->modules[cell->type];
- cell->type = mod->derive(design, cell->parameters);
+ cell->type = mod->derive(design, cell->parameters, cell->signed_parameters);
cell->parameters.clear();
did_something = true;
}
diff --git a/passes/techmap/techmap.cc b/passes/techmap/techmap.cc
index 4f9d9c4e..c3af697b 100644
--- a/passes/techmap/techmap.cc
+++ b/passes/techmap/techmap.cc
@@ -239,7 +239,7 @@ static bool techmap_module(RTLIL::Design *design, RTLIL::Module *module, RTLIL::
tpl = techmap_cache[key];
} else {
if (cell->parameters.size() != 0) {
- derived_name = tpl->derive(map, parameters);
+ derived_name = tpl->derive(map, parameters, cell->signed_parameters);
tpl = map->modules[derived_name];
log_continue = true;
}