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-rw-r--r--techlibs/greenpak4/cells_sim.v8
1 files changed, 4 insertions, 4 deletions
diff --git a/techlibs/greenpak4/cells_sim.v b/techlibs/greenpak4/cells_sim.v
index 6bcbda8e..d9ddaacc 100644
--- a/techlibs/greenpak4/cells_sim.v
+++ b/techlibs/greenpak4/cells_sim.v
@@ -1,4 +1,4 @@
-module DFF(input D, CLK, nRSTZ, nSETZ, output reg Q);
+module GP_DFF(input D, CLK, nRSTZ, nSETZ, output reg Q);
always @(posedge CLK, negedge nRSTZ, negedge nSETZ) begin
if (!nRSTZ)
Q <= 1'b0;
@@ -9,17 +9,17 @@ module DFF(input D, CLK, nRSTZ, nSETZ, output reg Q);
end
endmodule
-module LUT2(input IN0, IN1, output OUT);
+module GP_2LUT(input IN0, IN1, output OUT);
parameter [3:0] INIT = 0;
assign OUT = INIT[{IN1, IN0}];
endmodule
-module LUT3(input IN0, IN1, IN2, output OUT);
+module GP_3LUT(input IN0, IN1, IN2, output OUT);
parameter [7:0] INIT = 0;
assign OUT = INIT[{IN2, IN1, IN0}];
endmodule
-module LUT4(input IN0, IN1, IN2, IN3, output OUT);
+module GP_4LUT(input IN0, IN1, IN2, IN3, output OUT);
parameter [15:0] INIT = 0;
assign OUT = INIT[{IN3, IN2, IN1, IN0}];
endmodule