diff options
Diffstat (limited to 'techlibs/ice40/brams_map.v')
| -rw-r--r-- | techlibs/ice40/brams_map.v | 37 |
1 files changed, 21 insertions, 16 deletions
diff --git a/techlibs/ice40/brams_map.v b/techlibs/ice40/brams_map.v index d6ebb249..8c5c7e81 100644 --- a/techlibs/ice40/brams_map.v +++ b/techlibs/ice40/brams_map.v @@ -230,6 +230,8 @@ module \$__ICE40_RAM4K_M123 (CLK2, CLK3, A1ADDR, A1DATA, B1ADDR, B1DATA, B1EN); parameter [0:0] CLKPOL2 = 1; parameter [0:0] CLKPOL3 = 1; + parameter [4095:0] INIT = 4096'bx; + localparam MODE = CFG_ABITS == 9 ? 1 : CFG_ABITS == 10 ? 2 : @@ -256,14 +258,17 @@ module \$__ICE40_RAM4K_M123 (CLK2, CLK3, A1ADDR, A1DATA, B1ADDR, B1DATA, B1EN); A1DATA_16[ 6], A1DATA_16[ 4], A1DATA_16[ 2], A1DATA_16[ 0]}; assign {B1DATA_16[14], B1DATA_16[12], B1DATA_16[10], B1DATA_16[ 8], B1DATA_16[ 6], B1DATA_16[ 4], B1DATA_16[ 2], B1DATA_16[ 0]} = B1DATA; + `include "brams_init1.vh" end if (MODE == 2) begin assign A1DATA = {A1DATA_16[13], A1DATA_16[9], A1DATA_16[5], A1DATA_16[1]}; assign {B1DATA_16[13], B1DATA_16[9], B1DATA_16[5], B1DATA_16[1]} = B1DATA; + `include "brams_init2.vh" end if (MODE == 3) begin assign A1DATA = {A1DATA_16[11], A1DATA_16[3]}; assign {B1DATA_16[11], B1DATA_16[3]} = B1DATA; + `include "brams_init3.vh" end endgenerate @@ -272,22 +277,22 @@ module \$__ICE40_RAM4K_M123 (CLK2, CLK3, A1ADDR, A1DATA, B1ADDR, B1DATA, B1EN); .WRITE_MODE(MODE), .NEGCLK_R(!CLKPOL2), .NEGCLK_W(!CLKPOL3), - // .INIT_0(INIT[ 0*256 +: 256]), - // .INIT_1(INIT[ 1*256 +: 256]), - // .INIT_2(INIT[ 2*256 +: 256]), - // .INIT_3(INIT[ 3*256 +: 256]), - // .INIT_4(INIT[ 4*256 +: 256]), - // .INIT_5(INIT[ 5*256 +: 256]), - // .INIT_6(INIT[ 6*256 +: 256]), - // .INIT_7(INIT[ 7*256 +: 256]), - // .INIT_8(INIT[ 8*256 +: 256]), - // .INIT_9(INIT[ 9*256 +: 256]), - // .INIT_A(INIT[10*256 +: 256]), - // .INIT_B(INIT[11*256 +: 256]), - // .INIT_C(INIT[12*256 +: 256]), - // .INIT_D(INIT[13*256 +: 256]), - // .INIT_E(INIT[14*256 +: 256]), - // .INIT_F(INIT[15*256 +: 256]) + .INIT_0(INIT_0), + .INIT_1(INIT_1), + .INIT_2(INIT_2), + .INIT_3(INIT_3), + .INIT_4(INIT_4), + .INIT_5(INIT_5), + .INIT_6(INIT_6), + .INIT_7(INIT_7), + .INIT_8(INIT_8), + .INIT_9(INIT_9), + .INIT_A(INIT_A), + .INIT_B(INIT_B), + .INIT_C(INIT_C), + .INIT_D(INIT_D), + .INIT_E(INIT_E), + .INIT_F(INIT_F) ) _TECHMAP_REPLACE_ ( .RDATA(A1DATA_16), .RADDR(A1ADDR_11), |