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Diffstat (limited to 'techlibs/xilinx/cells_sim.v')
| -rw-r--r-- | techlibs/xilinx/cells_sim.v | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/techlibs/xilinx/cells_sim.v b/techlibs/xilinx/cells_sim.v index cb290db8..138a6470 100644 --- a/techlibs/xilinx/cells_sim.v +++ b/techlibs/xilinx/cells_sim.v @@ -1,4 +1,8 @@ +// See Xilinx UG953 and UG474 for a description of the cell types below. +// http://www.xilinx.com/support/documentation/user_guides/ug474_7Series_CLB.pdf +// http://www.xilinx.com/support/documentation/sw_manuals/xilinx2014_4/ug953-vivado-7series-libraries.pdf + module VCC(output P); assign P = 1; endmodule |