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-rw-r--r--techlibs/xilinx7/example_mojo_counter/example.sh5
1 files changed, 4 insertions, 1 deletions
diff --git a/techlibs/xilinx7/example_mojo_counter/example.sh b/techlibs/xilinx7/example_mojo_counter/example.sh
index 17fc650e..87af0ea3 100644
--- a/techlibs/xilinx7/example_mojo_counter/example.sh
+++ b/techlibs/xilinx7/example_mojo_counter/example.sh
@@ -19,11 +19,14 @@ abc -lut 6; opt
# map internal cells to FPGA cells
techmap -map ../cells.v; opt
+# insert i/o buffers
+iopadmap -outpad OBUF I:O -inpad BUFGP O:I
+
# write netlist
write_edif synth.edif
EOT
-cat > synth.ut <<- EOT
+cat > bitgen.ut <<- EOT
-w
-g DebugBitstream:No
-g Binary:no