1 files changed, 21 insertions, 0 deletions
diff --git a/tests/asicworld/code_hdl_models_parity_using_assign.v b/tests/asicworld/code_hdl_models_parity_using_assign.v
new file mode 100644
index 00000000..b0282e8d
--- /dev/null
+++ b/tests/asicworld/code_hdl_models_parity_using_assign.v
@@ -0,0 +1,21 @@
+//-----------------------------------------------------
+// Design Name : parity_using_assign
+// File Name   : parity_using_assign.v
+// Function    : Parity using assign
+// Coder       : Deepak Kumar Tala
+//-----------------------------------------------------
+module parity_using_assign (
+data_in    , //  8 bit data in
+parity_out   //  1 bit parity out
+);
+output  parity_out ;
+input [7:0] data_in ; 
+     
+wire parity_out ;
+      
+assign parity_out =  (data_in[0] ^ data_in[1]) ^  
+                     (data_in[2] ^ data_in[3]) ^ 
+                     (data_in[4] ^ data_in[5]) ^  
+                     (data_in[6] ^ data_in[7]);
+
+endmodule