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-rw-r--r--tests/simple/generate.v67
1 files changed, 67 insertions, 0 deletions
diff --git a/tests/simple/generate.v b/tests/simple/generate.v
index 24eb4462..0e353ad9 100644
--- a/tests/simple/generate.v
+++ b/tests/simple/generate.v
@@ -90,5 +90,72 @@ generate
endcase
end
endgenerate
+endmodule
+
+// ------------------------------------------
+
+module gen_test4(a, b);
+
+input [3:0] a;
+output [3:0] b;
+
+genvar i;
+generate
+ for (i=0; i < 3; i=i+1) begin : foo
+ localparam PREV = i - 1;
+ wire temp;
+ if (i == 0)
+ assign temp = a[0];
+ else
+ assign temp = foo[PREV].temp & a[i];
+ assign b[i] = temp;
+ end
+endgenerate
+endmodule
+
+// ------------------------------------------
+
+module gen_test5(input_bits, out);
+
+parameter WIDTH = 256;
+parameter CHUNK = 4;
+
+input [WIDTH-1:0] input_bits;
+output out;
+
+genvar step, i, j;
+generate
+ for (step = 1; step <= WIDTH; step = step * CHUNK) begin : steps
+ localparam PREV = step / CHUNK;
+ localparam DIM = WIDTH / step;
+ for (i = 0; i < DIM; i = i + 1) begin : outer
+ localparam LAST_START = i * CHUNK;
+ for (j = 0; j < CHUNK; j = j + 1) begin : inner
+ wire temp;
+ if (step == 1)
+ assign temp = input_bits[i];
+ else if (j == 0)
+ assign temp = steps[PREV].outer[LAST_START].val;
+ else
+ assign temp
+ = steps[step].outer[i].inner[j-1].temp
+ & steps[PREV].outer[LAST_START + j].val;
+ end
+ wire val;
+ assign val = steps[step].outer[i].inner[CHUNK - 1].temp;
+ end
+ end
+endgenerate
+assign out = steps[WIDTH].outer[0].val;
+endmodule
+// ------------------------------------------
+
+module gen_test6(output [3:0] o);
+generate
+ genvar i;
+ for (i = 3; i >= 0; i = i-1) begin
+ assign o[i] = 1'b0;
+ end
+endgenerate
endmodule