yosys - Debian dgit repo for package yosys

	Commit message (Expand)	Author	Age
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* \|	Fixed const folding of ternary operator	Clifford Wolf	2013-11-04
* \|	Use proper bit width ans sign extension for const folding	Clifford Wolf	2013-11-04
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*	Improved comments on topological sort in edif backend	Clifford Wolf	2013-11-04
*	Fixes for early width and sign detection in ast simplifier	Clifford Wolf	2013-11-04
*	further improved early width and sign detection in ast simplifier	Clifford Wolf	2013-11-04
*	Added simple topological sort to edif backend	Clifford Wolf	2013-11-03
*	Write yosys version to output files	Clifford Wolf	2013-11-03
*	Merge branch 'master' of github.com:cliffordwolf/yosys	Clifford Wolf	2013-11-03
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\| *	Added resolution of positional arguments to hierarchy pass	Clifford Wolf	2013-11-03
\| *	Ignore explicit unconnected ports in intersynth backend	Clifford Wolf	2013-11-03
* \|	Fixed detectSignWidthWorker (ast frontend) for AST_CONCAT	Clifford Wolf	2013-11-03
* \|	Behavior should be identical now to rev. 0b4a64ac6adbd6 (next: testing before...	Clifford Wolf	2013-11-02
* \|	Added roadmap to readme file	Clifford Wolf	2013-11-02
* \|	Various ast changes for early expression width detection (prep for constfold ...	Clifford Wolf	2013-11-02
* \|	Added DFFSR cell to techlibs/cmos/cmos_cells.lib	Clifford Wolf	2013-10-31
* \|	Added placeholder check to dfflibmap and cleaned up some other placeholder ch...	Clifford Wolf	2013-10-31
* \|	Changed MiniSAT feater defines again	Clifford Wolf	2013-10-31
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*	Added paragraph to README file to avoid mycells.lib confusion	Clifford Wolf	2013-10-31
*	README file typo fix	Clifford Wolf	2013-10-31
*	Some additions to the README file	Clifford Wolf	2013-10-31
*	Fixed ezminisat C++ errors: undef PRIi64	Clifford Wolf	2013-10-30
*	Added detection for endless recursion in fsm_detect pass	Clifford Wolf	2013-10-30
*	Fixed help message typo (memory pass)	Clifford Wolf	2013-10-30
*	Added -format option to splitnets	Clifford Wolf	2013-10-29
*	Merge pull request #12 from jameswalmsley/master	Clifford Wolf	2013-10-27
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\| *	[EXAMPLES] Ported the mojo counter example to Zynq ZED board.	James Walmsley	2013-10-27
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*	Fixed get_share_file_name() for installed yosys	Clifford Wolf	2013-10-27
*	Cleanups in xilinx examples	Clifford Wolf	2013-10-27
*	Added synth_xilinx command	Clifford Wolf	2013-10-27
*	Added API and Makefile rules for share/ files	Clifford Wolf	2013-10-27
*	Added design->full_selection() helper method	Clifford Wolf	2013-10-27
*	Moved simple xilinx counter sim example to subdir	Clifford Wolf	2013-10-27
*	Xilinx mojo_counter example is now working	Clifford Wolf	2013-10-27
*	Fixed hex string generation bug in edif backend	Clifford Wolf	2013-10-27
*	Renamed techlibs/xilinx7 to techlibs/xilinx	Clifford Wolf	2013-10-26
*	Improved xilinx mojo_counter example	Clifford Wolf	2013-10-26
*	Added support for i/o buffers to iopadmap	Clifford Wolf	2013-10-26
*	Added another xilinx example (not funcional yet)	Clifford Wolf	2013-10-26
*	Added support for sr flip-flops to dfflibmap	Clifford Wolf	2013-10-24
*	Added support for complex set-reset flip-flops in proc_dff	Clifford Wolf	2013-10-24
*	Fixed handling of boolean attributes (passes)	Clifford Wolf	2013-10-24
*	Fixed handling of boolean attributes (backends)	Clifford Wolf	2013-10-24
*	Fixed handling of boolean attributes (frontends)	Clifford Wolf	2013-10-24
*	Fixed handling of boolean attributes (kernel)	Clifford Wolf	2013-10-24
*	Fixed parsing of value-less attributes in ilang	Clifford Wolf	2013-10-23
*	Improved handling of dff with async resets	Clifford Wolf	2013-10-21
*	Added handling of multiple async paths in proc_arst	Clifford Wolf	2013-10-19
*	Changed NEW_WIRE API to return the wire, not the signal	Clifford Wolf	2013-10-18
*	Added dffsr support to proc_dff pass	Clifford Wolf	2013-10-18
*	Added RTLIL NEW_WIRE macro	Clifford Wolf	2013-10-18