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* set "keep" on modules with $assert cells in "hierarchy"Clifford Wolf2014-09-30
* Added support for "keep" on modulesClifford Wolf2014-09-29
* namespace YosysClifford Wolf2014-09-27
* Merge pull request #39 from ahmedirfan1983/masterClifford Wolf2014-09-22
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| * Merge branch 'master' of https://github.com/cliffordwolf/yosys into btorAhmed Irfan2014-09-22
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* | Re-enabled assert for new logic loops in "share" passClifford Wolf2014-09-21
* | Various improvements regarding logic loops in "share" resultsClifford Wolf2014-09-21
* | Logic loop bugfix for "share" passClifford Wolf2014-09-21
* | Added "share -limit"Clifford Wolf2014-09-21
* | Still loop bug in "share": changed assert to warningClifford Wolf2014-09-21
* | Do not introduce new logic loops in "share"Clifford Wolf2014-09-21
* | Assert on new logic loops in "share" passClifford Wolf2014-09-21
* | Added "test_abcloop" commandClifford Wolf2014-09-19
* | Initialize RTLIL::Const from std::vector<bool>Clifford Wolf2014-09-19
* | Sorting of object names in ilang backendClifford Wolf2014-09-19
* | Small improvements in "abc" command handle_loops() functionClifford Wolf2014-09-19
* | Using "NOT" instead of "INV" as cell name in default abc genlib fileClifford Wolf2014-09-19
* | Alphabetically sort port names in "show" outputClifford Wolf2014-09-19
* | Do not run "scorr" in "abc -fast"Clifford Wolf2014-09-18
* | Improvements in "synth" scriptClifford Wolf2014-09-18
* | Added "abc -fast"Clifford Wolf2014-09-18
* | Added commit count to devel version numberClifford Wolf2014-09-17
* | Fixed $_NOR vs. $_NOR_ typo in abc.ccClifford Wolf2014-09-16
* | Fixed $memwr/$memrd order in memory_dffClifford Wolf2014-09-16
* | Added new CodingReadme file (replaces CodingStyle and CHECKLISTS)Clifford Wolf2014-09-16
* | Fixed $macc simlib model for zero-configClifford Wolf2014-09-16
* | More aggressive $macc merging in alumaccClifford Wolf2014-09-15
* | Added the obvious optimizations to alumacc $macc generatorClifford Wolf2014-09-15
* | Improved maccmap tree bit packingClifford Wolf2014-09-15
* | Fixed wreduce $shiftx handlingClifford Wolf2014-09-15
* | Fixed monitor notifications for removed cellClifford Wolf2014-09-14
* | Added "synth" commandClifford Wolf2014-09-14
* | Fixed techmap_wrap for techmap_celltypeClifford Wolf2014-09-14
* | Using alumacc in techmap.vClifford Wolf2014-09-14
* | Various fixes/cleanups in alumacc and maccmapClifford Wolf2014-09-14
* | Added techmap_wrap attributeClifford Wolf2014-09-14
* | alumacc fix for $pos cellsClifford Wolf2014-09-14
* | Extract $alu cells in alumaccClifford Wolf2014-09-14
* | Merge $macc cells in alumacc passClifford Wolf2014-09-14
* | Basic $macc extract in alumaccClifford Wolf2014-09-14
* | alumacc skeletonClifford Wolf2014-09-14
* | Cleanup in wreduceClifford Wolf2014-09-14
* | Using pkg-config to find libffiClifford Wolf2014-09-13
* | Fixed simlib $macc model for xilinx xsimClifford Wolf2014-09-08
* | Simplified $fa undef modelClifford Wolf2014-09-08
* | Fixes and cleanups for blackbox.vClifford Wolf2014-09-08
* | Added $lcu cell typeClifford Wolf2014-09-08
* | Another $clog2 bugfixClifford Wolf2014-09-08
* | Added "$fa" cell typeClifford Wolf2014-09-08
* | Trim msb/lsb zero bits from full adder in maccmapClifford Wolf2014-09-08