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* Progress in presentationClifford Wolf2014-02-16
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* Added some additional checks to techmapClifford Wolf2014-02-16
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* Added CONSTMSK and CONSTVAL feature to techmapClifford Wolf2014-02-16
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* Fixed handling of "keep" attribute on wires in opt_cleanClifford Wolf2014-02-16
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* Added a warning note about error reporting to read_verilog help messageClifford Wolf2014-02-16
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* Progress in presentationClifford Wolf2014-02-16
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* Fixed use of selection in splitnets commandClifford Wolf2014-02-16
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* Added recursion support to techmapClifford Wolf2014-02-16
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* Progress in presentationClifford Wolf2014-02-16
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* Progress in presentationClifford Wolf2014-02-16
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* Improved support for constant functionsClifford Wolf2014-02-16
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* Now we are in Yoys 0.2.0+ developmentClifford Wolf2014-02-16
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* Tagging Yoys 0.2.0Clifford Wolf2014-02-16
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* Added != support for relational select patternClifford Wolf2014-02-16
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* Added iopadmap -bitsClifford Wolf2014-02-15
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* Added ff and latch support to read_libertyClifford Wolf2014-02-15
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* Bugfix in expression parser of read_libertyClifford Wolf2014-02-15
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* Fixed dfflibmap for cell libraries with no set-reset-ffClifford Wolf2014-02-15
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* Correctly convert constants to RTLIL (fixed undef handling)Clifford Wolf2014-02-15
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* Added frontend (-f) option to autotest.shClifford Wolf2014-02-15
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* Fixed opt_const handling of double invert with non-1 output widthClifford Wolf2014-02-15
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* Added liberty frontendClifford Wolf2014-02-15
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* Be more conservative with new const-function codeClifford Wolf2014-02-14
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* Added support for FOR loops in function calls in parametersClifford Wolf2014-02-14
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* Created basic support for function calls in parameter valuesClifford Wolf2014-02-14
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* Added abc -keepff optionClifford Wolf2014-02-14
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* updated default ABC command stringsClifford Wolf2014-02-13
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* Updated ABCClifford Wolf2014-02-13
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* Implemented read_verilog -deferClifford Wolf2014-02-13
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* Removed double blanks in ABC default command sequencesClifford Wolf2014-02-13
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* Merge branch 'master' of github.com:cliffordwolf/yosysClifford Wolf2014-02-13
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| * Merge pull request #26 from ahmedirfan1983/btorClifford Wolf2014-02-12
| |\ | | | | | | Btor
| | * modified btor synthesis script for correct use of splice command.Ahmed Irfan2014-02-12
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| | * disabling splice command in the scriptAhmed Irfan2014-02-11
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| | * register output correctedAhmed Irfan2014-02-11
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| | * Merge branch 'master' of https://github.com/cliffordwolf/yosys into btorAhmed Irfan2014-02-11
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| | * | added concat and slice cell translationAhmed Irfan2014-02-11
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* | | | Updated ABC and some related changesClifford Wolf2014-02-13
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* | | Merge branch 'master' of github.com:cliffordwolf/yosysClifford Wolf2014-02-12
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| * | | Disabled "abc -dff" in "make test" for now (waiting for scorr bugfix in ABC)Clifford Wolf2014-02-12
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* | | | Added support for functions returning integerClifford Wolf2014-02-12
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* | | Updated ABC to rev e97a6e1d59b9Clifford Wolf2014-02-12
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* | | renamed ilang "scope error" to "ilang error"Clifford Wolf2014-02-11
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* | More Makefile cleanupsClifford Wolf2014-02-11
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* | Improved "make manual" and "make clean"Clifford Wolf2014-02-11
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* Improved ilang parser error messagesClifford Wolf2014-02-09
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* fixed a bug in subcircuit library with cells that have connections to itselfClifford Wolf2014-02-09
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* Various improvements in expose command (added -sep and -cut)Clifford Wolf2014-02-09
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* Added delete {-input|-output|-port}Clifford Wolf2014-02-09
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* Bugfix in delete commandClifford Wolf2014-02-09
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