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* Added RTLIL::Module::connect(const RTLIL::SigSig&)Clifford Wolf2014-07-26
* Use "wget -N" in tests/vloghtb/run-test.shClifford Wolf2014-07-26
* Added "passed" message to make test targetsClifford Wolf2014-07-26
* Automatically pack SigSpec on copy/assignClifford Wolf2014-07-26
* Added new RTLIL::Cell port access methodsClifford Wolf2014-07-26
* Renamed RTLIL::{Module,Cell}::connections to connections_Clifford Wolf2014-07-26
* Cosmetic fixes for "make abc"Clifford Wolf2014-07-26
* Added "Checklist for adding internal cell types"Clifford Wolf2014-07-26
* Added copy-constructor-like module->addCell(name, other) methodClifford Wolf2014-07-26
* Use only module->addCell() and module->remove() to create and delete cellsClifford Wolf2014-07-25
* Various RTLIL::SigSpec related code cleanupsClifford Wolf2014-07-25
* Added RTLIL::SigSpec is_chunk()/as_chunk() APIClifford Wolf2014-07-25
* Added "make vgtest"Clifford Wolf2014-07-25
* Fixed two memory leaks in ast simplifyClifford Wolf2014-07-25
* Renamed some of the test cases in tests/simple to avoid name collisionsClifford Wolf2014-07-25
* Fixed memory corruption in "opt_reduce" passClifford Wolf2014-07-25
* Disabled cover() for non-linux buildsClifford Wolf2014-07-25
* Added more stuff to checklistClifford Wolf2014-07-25
* Updated verific build/test instructionsClifford Wolf2014-07-25
* Improvements in "cover" commandClifford Wolf2014-07-25
* Removed Minisat dependency on zlibClifford Wolf2014-07-25
* Added more stuff to the checklistClifford Wolf2014-07-25
* Fixed typo in cover idClifford Wolf2014-07-25
* Added "make clean-abc"Clifford Wolf2014-07-25
* Further improved "make" prettinessClifford Wolf2014-07-25
* Replaced more old SigChunk programming patternsClifford Wolf2014-07-24
* Updated ABC to hg id "b1e63d18768d"Clifford Wolf2014-07-24
* Added cover() calls to opt_constClifford Wolf2014-07-24
* Added cover_list() APIClifford Wolf2014-07-24
* Added "make SMALL=1"Clifford Wolf2014-07-24
* Now "make PRETTY=1" is the default settingClifford Wolf2014-07-24
* Added percentage display to "make PRETTY=1"Clifford Wolf2014-07-24
* Added "make PRETTY=1"Clifford Wolf2014-07-24
* Added "cover" commandClifford Wolf2014-07-24
* Some improvements in SigSpec packing/unpacking and checkingClifford Wolf2014-07-24
* Now using a dedicated ELF section for all coverage countersClifford Wolf2014-07-24
* Small changes regarding cover() and check() in SigSpecClifford Wolf2014-07-24
* Renamed RELEASE_CHECKLIST -> CHECKLISTClifford Wolf2014-07-24
* Added support for YOSYS_COVER_FILE env variableClifford Wolf2014-07-24
* Added cover() calls to RTLIL::SigSpec methodsClifford Wolf2014-07-24
* Added support for YOSYS_COVER_DIR env variableClifford Wolf2014-07-24
* Added cover() APIClifford Wolf2014-07-24
* Added RELEASE_CHECKLISTClifford Wolf2014-07-24
* Added "make config-gcc-4.7"Clifford Wolf2014-07-24
* Added "make vloghtb"Clifford Wolf2014-07-24
* Added hashing to RTLIL::SigSpec relational and equal operatorsClifford Wolf2014-07-23
* Disabled RTLIL::SigSpec::check() in release buildsClifford Wolf2014-07-23
* Fixed release buildClifford Wolf2014-07-23
* Various fixes in Verific frontend for new RTLIL APIClifford Wolf2014-07-23
* Added RTLIL::SigSpec::repeat()Clifford Wolf2014-07-23