yosys - Debian dgit repo for package yosys

	Commit message (Expand)	Author	Age
*	fixed signdness detection for expressions with reals	Clifford Wolf	2014-06-21
*	fixed typo	Clifford Wolf	2014-06-21
*	Progress in presentation	Clifford Wolf	2014-06-21
*	Do not create $dffsr cells with no-op resets in proc_dff	Clifford Wolf	2014-06-19
*	Added test case for AstNode::MEM2REG_FL_CMPLX_LHS	Clifford Wolf	2014-06-17
*	Added AstNode::MEM2REG_FL_CMPLX_LHS	Clifford Wolf	2014-06-17
*	Improved handling of relational op of real values	Clifford Wolf	2014-06-17
*	Little steps in realmath test bench	Clifford Wolf	2014-06-16
*	Improved ternary support for real values	Clifford Wolf	2014-06-16
*	Use undef (x/z vs. NaN) rules for real values from IEEE Std 1800-2012	Clifford Wolf	2014-06-16
*	Fixed parsing of TOK_INTEGER (implies TOK_SIGNED)	Clifford Wolf	2014-06-16
*	Added found_real feature to AstNode::detectSignWidth	Clifford Wolf	2014-06-16
*	Added more calls to "hierarchy" to README file	Clifford Wolf	2014-06-15
*	Removed long running tests from tests/simple/realexpr.v (replaced by tests/re...	Clifford Wolf	2014-06-15
*	Added tests/realmath to "make test"	Clifford Wolf	2014-06-15
*	Improved AstNode::realAsConst for large numbers	Clifford Wolf	2014-06-15
*	Improved realmath test bench	Clifford Wolf	2014-06-15
*	Improved parsing of large integer constants	Clifford Wolf	2014-06-15
*	Improved AstNode::asReal for large integers	Clifford Wolf	2014-06-15
*	improved realmath test bench	Clifford Wolf	2014-06-14
*	improved (fixed) conversion of real values to bit vectors	Clifford Wolf	2014-06-14
*	progress in realmath test bench	Clifford Wolf	2014-06-14
*	Fixed relational operators for const real expressions	Clifford Wolf	2014-06-14
*	added first draft of real math testcase generator	Clifford Wolf	2014-06-14
*	Progress in presentation	Clifford Wolf	2014-06-14
*	Added %D and %c select commands	Clifford Wolf	2014-06-14
*	Added support for math functions	Clifford Wolf	2014-06-14
*	Added realexpr.v test case	Clifford Wolf	2014-06-14
*	Added handling of real-valued parameters/localparams	Clifford Wolf	2014-06-14
*	Implemented more real arithmetic	Clifford Wolf	2014-06-14
*	Implemented basic real arithmetic	Clifford Wolf	2014-06-14
*	Added real->int convertion in ast genrtlil	Clifford Wolf	2014-06-14
*	Added Verilog lexer and parser support for real values	Clifford Wolf	2014-06-13
*	Added read_verilog -sv options, added support for bit, logic,	Clifford Wolf	2014-06-12
*	Now we are in Yoys 0.3.0+ development	Clifford Wolf	2014-06-08
*	Tagging Yosys 0.3.0	Clifford Wolf	2014-06-08
*	Updated ABC to 7600ffb9340c	Clifford Wolf	2014-06-08
*	added tests for new verilog features	Clifford Wolf	2014-06-07
*	fixed cell array handling of positional arguments	Clifford Wolf	2014-06-07
*	Add support for cell arrays	Clifford Wolf	2014-06-07
*	Added support for repeat stmt in const functions	Clifford Wolf	2014-06-07
*	further improved const function support	Clifford Wolf	2014-06-07
*	made the generate..endgenrate keywords optional	Clifford Wolf	2014-06-06
*	improved const function support	Clifford Wolf	2014-06-06
*	fix functions with no block (but single statement, loop, etc.)	Clifford Wolf	2014-06-06
*	Added tests/simple/repwhile.v	Clifford Wolf	2014-06-06
*	improved ast simplify of const functions	Clifford Wolf	2014-06-06
*	added while and repeat support to verilog parser	Clifford Wolf	2014-06-06
*	Improved error message for options after front-end filename arguments	Clifford Wolf	2014-06-04
*	added tee cmd	Clifford Wolf	2014-06-03