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* Implemented TCL support (only via -c option at the moment)Clifford Wolf2013-03-28
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* Improved subcircuit verbose output (added portmapper results)Clifford Wolf2013-03-28
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* Fixed svgviewer hacks for builtin filesClifford Wolf2013-03-28
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* Added proper TECHMAP_FAIL support and added support for the celltype ↵Clifford Wolf2013-03-28
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* Implemented proper handling of stub placeholder modulesClifford Wolf2013-03-28
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* Keep viewport transform stable on reload in yosys-svgviewerClifford Wolf2013-03-27
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* Added check: only one module for "show" unless format is "ps"Clifford Wolf2013-03-27
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* Now using SVG and yosys-svgviewer per default in show commandClifford Wolf2013-03-27
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* Added yosys-svgviewer to build system and renamed filterlib to yosys-filterlibClifford Wolf2013-03-27
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* Imported svgviewer from qt4.8Clifford Wolf2013-03-27
| | | | | This is from commit 543486a41963f8d20d9771d2107cdd5a22894bdb in the Qt git repository: git://gitorious.org/qt/qt.git
* Create nice errors when calling RTLIL::Module::derive() of base classClifford Wolf2013-03-26
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* Collect parameters in hierarchy -generate (and do nothing with them)Clifford Wolf2013-03-26
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* Tiny bugfix in simlib.vClifford Wolf2013-03-26
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* Improvements and bugfixes for generate blocks with local signalsClifford Wolf2013-03-26
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* Fixed handling of unconditional generate blocksClifford Wolf2013-03-26
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* Added nosync attribute and some async reset related fixesClifford Wolf2013-03-25
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* Improved verbose output of subcircuitClifford Wolf2013-03-25
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* Improved method for finding fsm_expand candidatesClifford Wolf2013-03-25
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* Added hierarchy -generate command for generating skeletton modulesClifford Wolf2013-03-25
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* Changed fsm_expand to merge multiplexers more aggressivelyClifford Wolf2013-03-24
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* Renamed hansimem.v test case to mem_arst.vClifford Wolf2013-03-24
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* Fixed handling of show -viewerClifford Wolf2013-03-24
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* Fixed handling of internal signals in show commandClifford Wolf2013-03-24
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* Improved show -colors color assignmentsClifford Wolf2013-03-24
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* Added show -strech and renamed -widthlabels to -widthClifford Wolf2013-03-24
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* Added -widthlabels options to chow commandClifford Wolf2013-03-24
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* Added -notypes option to intersynth backendClifford Wolf2013-03-24
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* Reorganized TODOsClifford Wolf2013-03-24
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* Added mem2reg option to verilog frontendClifford Wolf2013-03-24
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* Fixed stdcells.v for $adff with undef reset valueClifford Wolf2013-03-24
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* Another fix in mem2reg ast simplify logicClifford Wolf2013-03-24
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* Added -colors option to show commandClifford Wolf2013-03-24
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* Added hansimem testcase (memory with async reset)Clifford Wolf2013-03-24
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* Improved mem2reg handling in ast simplifierClifford Wolf2013-03-24
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* Fixed gcc build (intersynth backend)Clifford Wolf2013-03-23
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* Tiny fixes to verilog parserClifford Wolf2013-03-23
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* Various improvements in intersynth backendClifford Wolf2013-03-23
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* Added intersynth backendClifford Wolf2013-03-23
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* Added help -write-tex-command-reference-manual optionClifford Wolf2013-03-21
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* Added eclipse CDT project files to .gitignoreClifford Wolf2013-03-21
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* Added -S option for simple synthesis to gate logicClifford Wolf2013-03-21
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* Avoid verilog-2k in verilog backendClifford Wolf2013-03-21
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* Disabled the per-default dumping of ILANG codeClifford Wolf2013-03-21
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* Added -nomap option to memory passClifford Wolf2013-03-21
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* Merge branch 'hansiglaser-master'Clifford Wolf2013-03-19
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| * added optimizations for single-bit $eq/$ne with constant input to opt_constClifford Wolf2013-03-19
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| * improved $mux optimization in opt_constClifford Wolf2013-03-19
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| * keep $mux and $_MUX_ optimizations separate in opt_constClifford Wolf2013-03-19
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| * added a TODOJohann Glaser2013-03-18
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| * added one more suggestion to optimize MUXes in pass "opt_const"Johann Glaser2013-03-18
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