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* Added Xilinx example for Basys3 boardClifford Wolf2015-02-01
* Added EDIF backend support for multi-bit cell portsClifford Wolf2015-02-01
* Added missing ports and parameters to xilinx bramsClifford Wolf2015-02-01
* Added "make mklibyosys", some minor API changesClifford Wolf2015-02-01
* Minor README changesClifford Wolf2015-02-01
* Removed TODO list from README fileClifford Wolf2015-02-01
* Added yosys_banner(), Updated Copyright rangeClifford Wolf2015-02-01
* Added <algorithm> include to hashlib.hClifford Wolf2015-02-01
* Using selections in "ls" commandClifford Wolf2015-02-01
* Shorter "dump" optionsClifford Wolf2015-01-31
* Bugfix in opt_const $eq -> buffer codeClifford Wolf2015-01-31
* Log msg changeClifford Wolf2015-01-31
* Fixed equiv_make for partially undriven nets (e.g. after "clean -purge")Clifford Wolf2015-01-31
* Added "equiv_induct -undef"Clifford Wolf2015-01-31
* Added "equiv_simple -undef"Clifford Wolf2015-01-31
* Added "equiv_make -blacklist <file> -encfile <file>"Clifford Wolf2015-01-31
* Synced RTLIL::unescape_id() to log_id() behaviorClifford Wolf2015-01-30
* Added "fsm -encfile"Clifford Wolf2015-01-30
* More log_id() stuffClifford Wolf2015-01-30
* Some cleanups in log.ccClifford Wolf2015-01-30
* Improved an error messageClifford Wolf2015-01-28
* Fixed bug in equiv_miterClifford Wolf2015-01-28
* Added "sat -show-ports"Clifford Wolf2015-01-27
* Bugfix in resource sharing testClifford Wolf2015-01-27
* Updaed ABC to hg rev 61ad5f908c03Clifford Wolf2015-01-27
* Rethrow with "catch(...) throw;"Clifford Wolf2015-01-25
* Added equiv_removeClifford Wolf2015-01-25
* Added equiv_miterClifford Wolf2015-01-25
* Added ENABLE_NDEBUG makefile optionsClifford Wolf2015-01-24
* Added #ifdef NDEBUG for log_assert()Clifford Wolf2015-01-24
* Fixed xilinx FDSE sim modelClifford Wolf2015-01-24
* Various equiv_* improvementsClifford Wolf2015-01-24
* Added dict/pool.sort()Clifford Wolf2015-01-24
* Improvements in equiv_make, equiv_inductClifford Wolf2015-01-22
* Improved xdot callingClifford Wolf2015-01-22
* Added equiv_inductClifford Wolf2015-01-22
* Various equiv_simple improvementsClifford Wolf2015-01-22
* Moved equiv stuff to passes/equiv/Clifford Wolf2015-01-22
* Progress in equiv_simpleClifford Wolf2015-01-21
* Fixed opt_muxtree performance bugClifford Wolf2015-01-21
* Faster "make clean-abc"Clifford Wolf2015-01-20
* README stuffClifford Wolf2015-01-20
* Added equiv_simpleClifford Wolf2015-01-19
* Added equiv_statusClifford Wolf2015-01-19
* Added equiv_make commandClifford Wolf2015-01-19
* Added $equiv cell typeClifford Wolf2015-01-19
* Merge branch 'master' of github.com:cliffordwolf/yosysClifford Wolf2015-01-18
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| * Merge pull request #47 from mschmoelzer/masterClifford Wolf2015-01-18
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| | * Add "echo-yosys-ver" and "echo-git-rev" Makefile targets.Martin Schmölzer2015-01-18
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* | Various cleanups in xilinx techlibClifford Wolf2015-01-18