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Fixed parsing or liberty file statements such as 'clocked_on : "(!CLK)";'
Clifford Wolf
2013-10-16
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Added recommended apt-get commands to README
Clifford Wolf
2013-10-11
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Fixed minisat include
Clifford Wolf
2013-10-11
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Pinned ABC revision to 0f9e5488ced3
Clifford Wolf
2013-10-03
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Improvements in EDIF backend
Clifford Wolf
2013-09-17
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Added additional options to BLIF backend
Clifford Wolf
2013-09-15
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Added BLIF backend
Clifford Wolf
2013-09-15
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A couple of small fixes in SPICE backend
Clifford Wolf
2013-09-15
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Moved common techlib files to techlibs/common
Clifford Wolf
2013-09-15
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Updated manual
Clifford Wolf
2013-09-15
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Added spice testbench to techlibs/cmos
Clifford Wolf
2013-09-14
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Added spice backend
Clifford Wolf
2013-09-14
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Merge branch 'master' of github.com:cliffordwolf/yosys
Clifford Wolf
2013-09-03
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Encode large (>32 bits) parameters as hex string in edif backend
Clifford Wolf
2013-08-28
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Improved edif backend
Clifford Wolf
2013-08-27
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Added mapping to techlibs/xilinx7 testbench (exposes EDIF backend todos)
Clifford Wolf
2013-08-27
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Added -selected option to various backends
Clifford Wolf
2013-09-03
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Added simple xilinx7 technology mapping files
Clifford Wolf
2013-08-22
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More explicit integer output in verilog backend
Clifford Wolf
2013-08-22
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Added correct encoding of identifiers in EDIF backend
Clifford Wolf
2013-08-22
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Added edif backend (still under construction)
Clifford Wolf
2013-08-22
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Merge pull request #10 from hansiglaser/master
Clifford Wolf
2013-08-21
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fixed Verilog parser filename and line numbering issue with include files
Johann Glaser
2013-08-21
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Some minor documentation fixes
Clifford Wolf
2013-08-21
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Merge pull request #9 from hansiglaser/master
Clifford Wolf
2013-08-20
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Added support for include directories with the new '-I' argument of the
Johann Glaser
2013-08-20
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Merge pull request #8 from hansiglaser/master
Clifford Wolf
2013-08-20
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Added support for notif0/notif1 primitives
Johann Glaser
2013-08-20
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Added cleaning of old version_* files to version_* make rule
Clifford Wolf
2013-08-20
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Added version info to yosys command and added -V option
Clifford Wolf
2013-08-20
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Minor fixes in abc build instructions and abc pass
Clifford Wolf
2013-08-20
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Fixed width and sign detection for ** operator
Clifford Wolf
2013-08-19
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Added support for bufif0/bufif1 primitives
Clifford Wolf
2013-08-19
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Improved ast dumping (ast/verilog frontend)
Clifford Wolf
2013-08-19
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Implemented same div-by-zero behavior as found in other synthesis tools
Clifford Wolf
2013-08-15
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Fixed signed div/mod in const eval (rounding and stuff)
Clifford Wolf
2013-08-15
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Added ezsat api for creation of anonymous vectors
Clifford Wolf
2013-08-15
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Added sat -ignore_div_by_zero switch
Clifford Wolf
2013-08-15
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Added eval -brute_force_equiv_checker_x mode
Clifford Wolf
2013-08-15
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Added support for "2**n" shifter encoding
Clifford Wolf
2013-08-12
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Added SAT support for $div and $mod cells
Clifford Wolf
2013-08-11
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Added "clean -purge" and ";;;" support
Clifford Wolf
2013-08-11
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Added ";;" as shortcut for "; clean;"
Clifford Wolf
2013-08-11
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freduce performance fix
Clifford Wolf
2013-08-10
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Added $div and $mod technology mapping
Clifford Wolf
2013-08-09
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Added techmap -opt mode
Clifford Wolf
2013-08-09
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Some fixes to improve determinism
Clifford Wolf
2013-08-09
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Sort ctrl signals in fsm_extract
Clifford Wolf
2013-08-08
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Added -try option to freduce pass
Clifford Wolf
2013-08-08
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Added "clean" command (less verbose opt_clean)
Clifford Wolf
2013-08-08
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