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| * Removed date from auto-generated passes/techmap/stdcells.incClifford Wolf2013-03-18
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| * Fixed abc eeror handlingClifford Wolf2013-03-18
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| * add header to autogenerated file on its originJohann Glaser2013-03-18
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| * fixed typosJohann Glaser2013-03-18
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* Fixed strerrno vs. strerror types in ABC passClifford Wolf2013-03-17
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* Merge branch 'hansi'Clifford Wolf2013-03-17
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| * Cleaned up ABC file/io error handlingClifford Wolf2013-03-17
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| * Set execute bit on tests/openmsp430/run-synth.sh for realClifford Wolf2013-03-17
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| * added error checking at execution of ABCJohann Glaser2013-03-17
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * corrected typosJohann Glaser2013-03-17
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * set executable flags to run-synth.sh, added .gitignoreJohann Glaser2013-03-17
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * added ckeck for Icarus Verilog, otherwise the tests are silently stoppedJohann Glaser2013-03-17
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * corrected typosJohann Glaser2013-03-17
|/ | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Fixed gcc warnings and added error handling to shell escapeClifford Wolf2013-03-15
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* Added scc pass (find logic loops)Clifford Wolf2013-03-15
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* Added vi .*.swp files to .gitignoreClifford Wolf2013-03-15
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* Added [[CITE]] tags to abc and fsm_extract passesClifford Wolf2013-03-15
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* Added additional functionality and cleanups in sigtools.h and celltypes.hClifford Wolf2013-03-15
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* Changed prefix for selection operators from # to %Clifford Wolf2013-03-14
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* Added #ci and #co selection operatorsClifford Wolf2013-03-14
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* Added more features to #x selection operatorClifford Wolf2013-03-14
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* Added "select -write" commandClifford Wolf2013-03-14
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* More support code for $sr cellsClifford Wolf2013-03-14
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* Added $sr cell type to celltypes.hClifford Wolf2013-03-14
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* Fixed detection of public wires in opt_rmunusedClifford Wolf2013-03-10
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* Added shell escape to command languageClifford Wolf2013-03-10
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* Fixed and improved #x selection operatorClifford Wolf2013-03-08
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* Automatically select new objects in abc and techmap passesClifford Wolf2013-03-08
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* Added ## selection operator (union all on stack)Clifford Wolf2013-03-08
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* Added select -count modeClifford Wolf2013-03-08
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* Split extract -attr into extract -cell_attr and -wire_attrClifford Wolf2013-03-08
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* Added support for attribute matching in extract passClifford Wolf2013-03-07
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* Added portmapping support to subcircuit userCompareNodes() apiClifford Wolf2013-03-07
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* Cleanups and improvements in MakefileClifford Wolf2013-03-07
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* Fixed parsing of select #x<num> operatorClifford Wolf2013-03-06
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* Improved error message on failed module loadClifford Wolf2013-03-06
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* Added support for loadable modules (aka plugins)Clifford Wolf2013-03-06
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* Reset Makefile default config setting (oops)Clifford Wolf2013-03-06
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* Fixed mine test case for subcircuit libraryClifford Wolf2013-03-06
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* Fixed handling of constant values and port swapping in subcircuit libraryClifford Wolf2013-03-06
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* Changed default value for extract -mine_cells_spanClifford Wolf2013-03-05
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* Added some simple progress information to verbose subcircuit miner outputClifford Wolf2013-03-05
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* Implemented -mine_split option to extract passClifford Wolf2013-03-05
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* Implemented much better #x select operatorClifford Wolf2013-03-05
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* Implemented extract -mine_max_fanout <num> optionClifford Wolf2013-03-03
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* Performance optimization in subcircuit miningClifford Wolf2013-03-03
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* Fixed a gcc compiler warning [-Wparentheses]Clifford Wolf2013-03-03
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* Added "shared nodes" feature to the subcircuit libraryClifford Wolf2013-03-03
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* Added support for "extract_order" attribute to extract passClifford Wolf2013-03-03
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* Added design->select() api and use it in extract passClifford Wolf2013-03-03
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