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* Removed RTLIL::SigSpec::expand() methodClifford Wolf2014-07-23
* Added eclipse .setting folder to .gitignoreClifford Wolf2014-07-23
* Fixed all users of SigSpec::chunks_rw() and removed itClifford Wolf2014-07-23
* Replaced RTLIL::SigSpec::operator!=() with inline versionClifford Wolf2014-07-23
* Merge branch: Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructorClifford Wolf2014-07-23
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| * Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 3/3Clifford Wolf2014-07-23
| * Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 2/3Clifford Wolf2014-07-23
| * Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 1/3Clifford Wolf2014-07-23
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* Some cleanups in RTLIL::SigChunk::SigChunk(const RTLIL::Const&)Clifford Wolf2014-07-23
* SigSpec refactoring: More cleanups of old SigSpec use patternClifford Wolf2014-07-22
* SigSpec refactoring: Added RTLIL::SigSpecIteratorClifford Wolf2014-07-22
* SigSpec refactoring: cleanup of old SigSpec usage in fsm_* commandsClifford Wolf2014-07-22
* Fixed memory corruption with new SigSpec API in proc_muxClifford Wolf2014-07-22
* SigSpec refactoring: added RTLIL::SigSpec::operator[]Clifford Wolf2014-07-22
* fixed memory leak in fsm_optClifford Wolf2014-07-22
* SigSpec refactoring: rewrote some RTLIL::SigSpec methods to use unpacked formClifford Wolf2014-07-22
* Removed RTLIL::SigChunk::compare()Clifford Wolf2014-07-22
* SigSpec refactoring: added RTLIL::SigSpec::bits() and pack/unpack apiClifford Wolf2014-07-22
* SigSpec refactoring: change RTLIL::SigSpec::chunks() to be read-only, created...Clifford Wolf2014-07-22
* SigSpec refactoring: change RTLIL::SigSpec::size() to be read-onlyClifford Wolf2014-07-22
* SigSpec refactoring: using the accessor functions everywhereClifford Wolf2014-07-22
* SigSpec refactoring: renamed the SigSpec members to chunks_ and width_ and ad...Clifford Wolf2014-07-22
* SigSpec refactoring: renamed chunks and width to __chunks and __widthClifford Wolf2014-07-22
* Fixed ilang parsing of process attributesClifford Wolf2014-07-22
* Fixed make rules for ilang parserClifford Wolf2014-07-22
* Use "opt -fine" in test/vloght/test_mapopt.shClifford Wolf2014-07-21
* Added "opt_const -keepdc"Clifford Wolf2014-07-21
* Added mul to mux conversion to "opt_const -fine"Clifford Wolf2014-07-21
* Added "opt_const -fine" and "opt_reduce -fine"Clifford Wolf2014-07-21
* Added "autoidx" statement to ilang file formatClifford Wolf2014-07-21
* Added opt_const support for simple identitiesClifford Wolf2014-07-21
* Various improvements in test/vloghtbClifford Wolf2014-07-21
* Added support for scripts with labelsClifford Wolf2014-07-21
* Replaced depricated NEW_WIRE macro with module->addWire() callsClifford Wolf2014-07-21
* Removed deprecated module->new_wire()Clifford Wolf2014-07-21
* Wider range of cell types supported in "share" passClifford Wolf2014-07-21
* Bugfix in satgen for cells with wider in- than outputs.Clifford Wolf2014-07-21
* Added module->remove(), module->addWire(), module->addCell(), cell->check()Clifford Wolf2014-07-21
* Added log_ping()Clifford Wolf2014-07-21
* Use ezSAT::non_incremental() in "share" passClifford Wolf2014-07-21
* Added ezSAT::keep_cnf() and ezSAT::non_incremental()Clifford Wolf2014-07-21
* Fixed ezSAT stand-alone buildClifford Wolf2014-07-21
* Updated minisatClifford Wolf2014-07-21
* Using relative path names in minisat headersClifford Wolf2014-07-21
* Added yet another resource sharing test caseClifford Wolf2014-07-20
* Added support for resource sharing in mux control logicClifford Wolf2014-07-20
* Added "select -assert-count"Clifford Wolf2014-07-20
* Supercell creation for $div/$mod worked all along, fixed test benchesClifford Wolf2014-07-20
* Improved tests/share/generate.pyClifford Wolf2014-07-20
* Fixed creation of shift supercells in "share" passClifford Wolf2014-07-20