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* Various documentation updatesClifford Wolf2014-11-08
* Added "Nx" syntax to "show" command for repeating SigChunksClifford Wolf2014-11-08
* Added "used" attribute to entries in yosys_cover_listClifford Wolf2014-11-07
* Minor corrections in CodingReadmeClifford Wolf2014-11-07
* Improved TopoSort determinismClifford Wolf2014-11-07
* Fixed generation of temp names in verilog backendClifford Wolf2014-11-07
* Updated ABC to 5b5af75f1ddaClifford Wolf2014-11-07
* Changelog for Yosys 0.4Clifford Wolf2014-11-07
* Fixed typo in "log_cmd_error_exception"Clifford Wolf2014-11-07
* Made "cover" a compile-time option (disabled by default)Clifford Wolf2014-11-06
* Removed QMAKE variable from MakefileClifford Wolf2014-11-05
* Added "abc" label in synth scriptClifford Wolf2014-10-31
* Added "opt -full" alias for all more aggressive optimizationsClifford Wolf2014-10-31
* Fixed parsing of "module mymod #( parameter foo = 1, bar = 2 ..."Clifford Wolf2014-10-30
* Improved nomem2reg documentationClifford Wolf2014-10-30
* Added support for empty lines to here documentsClifford Wolf2014-10-29
* AST simplifier: optimize constant AST_CASE nodes before recursively descendingClifford Wolf2014-10-29
* Added support for task and function args in parenthesesClifford Wolf2014-10-27
* Improvements in $readmem[bh] implementationClifford Wolf2014-10-26
* Added support for $readmemh/$readmembClifford Wolf2014-10-26
* Fixed constant "cond ? string1 : string2" with strings of different sizeClifford Wolf2014-10-25
* Re-introduced Yosys::readsome() helper functionClifford Wolf2014-10-23
* minor indenting correctionsClifford Wolf2014-10-19
* Merge pull request #40 from parvizp/compile_mac_10.9.2Clifford Wolf2014-10-19
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| * Builds on Mac 10.9.2 with LLVM 3.5.Parviz Palangpour2014-10-19
* | Improved new_id() for win32Clifford Wolf2014-10-18
* | Also look for yosys-abc in parent dir on win32Clifford Wolf2014-10-18
* | Various improvements to version reporting on win32Clifford Wolf2014-10-18
* | Disabled READLINE in MXE cross buildClifford Wolf2014-10-18
* | Fixed typo in test_cellClifford Wolf2014-10-18
* | Fixed shell prompt and proc_self_dirname() for win32Clifford Wolf2014-10-18
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* Fixed various VS warningsClifford Wolf2014-10-18
* Create vcxsrc in mxe build "make dist"Clifford Wolf2014-10-18
* Moved yosys-config.in to misc/Clifford Wolf2014-10-18
* Added notes regarding building in VSClifford Wolf2014-10-17
* Added vcxproj_files.txt to MXE "make dist"Clifford Wolf2014-10-17
* More win32 (mxe and vs) build fixesClifford Wolf2014-10-17
* Various win32 / vs build fixesClifford Wolf2014-10-17
* Added genfiles.zip to MXE "make dist"Clifford Wolf2014-10-17
* Various MXE build fixesClifford Wolf2014-10-17
* Header changes so it will compile on VSWilliam Speirs2014-10-17
* Wrapped math in int constructorWilliam Speirs2014-10-17
* Fixed a few VS warningsClifford Wolf2014-10-17
* Don't be too smart with $dff cells with "init" attribute on out signalClifford Wolf2014-10-16
* Some cleanups in opt_cleanClifford Wolf2014-10-16
* Print "SystemVerilog" in "read_verilog -sv" log messagesClifford Wolf2014-10-16
* Fixed RTLIL::SigSpec::parse() for out-of-range bit- and part-selectsClifford Wolf2014-10-16
* Fixed handling of invalid array access in mem2reg codeClifford Wolf2014-10-16
* Replaced log_assert() do { ... } while (0) hack with a static inline functionClifford Wolf2014-10-15
* Fixed gcc warningClifford Wolf2014-10-15