| Commit message (Expand) | Author | Age | ||
|---|---|---|---|---|
| ... | ||||
| | * | | | | | | verilog default options pull | Ahmed Irfan | 2014-01-17 | |
| | * | | | | | | Merge branch 'master' of https://github.com/ahmedirfan1983/yosys into btor | Ahmed Irfan | 2014-01-17 | |
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| | | * | | | | | Merge pull request #4 from cliffordwolf/master | Ahmed Irfan | 2014-01-17 | |
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| | * | | | | | | | Merge branch 'master' of https://github.com/ahmedirfan1983/yosys into btor | Ahmed Irfan | 2014-01-17 | |
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| | | * | | | | | | Merge pull request #3 from cliffordwolf/master | Ahmed Irfan | 2014-01-17 | |
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| | * | | | | | | | slice error corrected | Ahmed Irfan | 2014-01-16 | |
| | * | | | | | | | width issues | Ahmed Irfan | 2014-01-15 | |
| | * | | | | | | | Merge branch 'master' of https://github.com/ahmedirfan1983/yosys into btor | Ahmed Irfan | 2014-01-15 | |
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| | | * | | | | | | Merge pull request #2 from cliffordwolf/master | Ahmed Irfan | 2014-01-15 | |
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| | * | | | | | | | | BTOR backend | Ahmed Irfan | 2014-01-14 | |
| | * | | | | | | | | Merge branch 'master' of https://github.com/ahmedirfan1983/yosys into btor | Ahmed Irfan | 2014-01-14 | |
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| | | * | | | | | | | Merge pull request #1 from cliffordwolf/master | Ahmed Irfan | 2014-01-14 | |
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| | * | \ \ \ \ \ \ \ | splitnet -driver feature | Ahmed Irfan | 2014-01-03 | |
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| | * \ \ \ \ \ \ \ \ \ | Merge branch 'master' of https://github.com/cliffordwolf/yosys into btor | Ahmed Irfan | 2014-01-03 | |
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| | * | | | | | | | | | | | makefile | Ahmed Irfan | 2014-01-03 | |
| | * | | | | | | | | | | | btor | Ahmed Irfan | 2014-01-03 | |
| * | | | | | | | | | | | | Fixed handling of unsized constants in verilog frontend | Clifford Wolf | 2014-01-24 | |
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| * | | | | | | | | | | | Fixed algorithmic complexity of AST simplification of long expressions | Clifford Wolf | 2014-01-20 | |
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| * | | | | | | | | | | Added hilomap command | Clifford Wolf | 2014-01-19 | |
| * | | | | | | | | | | Added sat -tempinduc and sat -prove-asserts | Clifford Wolf | 2014-01-19 | |
| * | | | | | | | | | | Added $assert support to satgen | Clifford Wolf | 2014-01-19 | |
| * | | | | | | | | | | Added $assert cell | Clifford Wolf | 2014-01-19 | |
| * | | | | | | | | | | Added Verilog parser support for asserts | Clifford Wolf | 2014-01-19 | |
| * | | | | | | | | | | Fixed $lut simlib model for a wider range of tools | Clifford Wolf | 2014-01-18 | |
| * | | | | | | | | | | Fixed parsing of verilog macros at end of line | Clifford Wolf | 2014-01-18 | |
| * | | | | | | | | | | More changes to simlib to make it friendlier to a wider range of tools | Clifford Wolf | 2014-01-18 | |
| * | | | | | | | | | | Fixed a type in $mem model in simlib.v | Clifford Wolf | 2014-01-18 | |
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| * | | | | | | | | | Removed cases of trailing comma in stdcells.v | Clifford Wolf | 2014-01-18 | |
| * | | | | | | | | | Added $bu0 cell to simlib.v | Clifford Wolf | 2014-01-18 | |
| * | | | | | | | | | Improved setundef random number generator | Clifford Wolf | 2014-01-18 | |
| * | | | | | | | | | Added setundef command | Clifford Wolf | 2014-01-17 | |
| * | | | | | | | | | Some improvements in log_dump_val_worker() templates | Clifford Wolf | 2014-01-17 | |
| * | | | | | | | | | Added techlibs/common/pmux2mux.v | Clifford Wolf | 2014-01-17 | |
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| * | | | | | | | | Added verilog_defaults command | Clifford Wolf | 2014-01-17 | |
| * | | | | | | | | Added support for $adff with undef data inputs to opt_rmdff | Clifford Wolf | 2014-01-17 | |
| * | | | | | | | | Added select -assert-none and -assert-any | Clifford Wolf | 2014-01-17 | |
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| * | | | | | | | Added automatic memid generation to memory_unpack command | Clifford Wolf | 2014-01-17 | |
| * | | | | | | | Added memory_unpack command | Clifford Wolf | 2014-01-17 | |
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| * | | | | | | Merge pull request #20 from mschmoelzer/master | Clifford Wolf | 2014-01-14 | |
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| | * | | | | | | Include unistd.h in passes/hierarchy/hierarchy.cc (required for access(3)) | Martin Schmölzer | 2014-01-14 | |
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| * | | | | | | Added hierarchy -libdir option | Clifford Wolf | 2014-01-14 | |
| * | | | | | | renamed LibertyParer to LibertyParser | Clifford Wolf | 2014-01-14 | |
| * | | | | | | Added "+" to list of liberty token characters | Clifford Wolf | 2014-01-14 | |
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| * | | | | | Added "opt_const -mux_undef" | Clifford Wolf | 2014-01-14 | |
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| * | | | | Fixed typo in frontends/ast/simplify.cc | Clifford Wolf | 2014-01-12 | |
| * | | | | Improved performance of freduce input cone reduction | Clifford Wolf | 2014-01-04 | |
| * | | | | Improved freduce performance on const signals | Clifford Wolf | 2014-01-04 | |
| * | | | | Performance improvements in freduce pass | Clifford Wolf | 2014-01-03 | |
| * | | | | More freduce cleanups | Clifford Wolf | 2014-01-03 | |
| * | | | | Added updating of RTLIL::autoidx to ilang frontend | Clifford Wolf | 2014-01-03 | |
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index : yosys | |
| Debian dgit repo for package yosys |
| summaryrefslogtreecommitdiff |