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* Added "check -assert" docClifford Wolf2015-02-22
* Added "check -assert"Clifford Wolf2015-02-22
* Fixed "sat -initsteps" off-by-one bugClifford Wolf2015-02-22
* Added "sat -stepsize" and "sat -tempinduct-step"Clifford Wolf2015-02-21
* sat docu changeClifford Wolf2015-02-21
* When "sat -tempinduct-baseonly -maxsteps N" reaches maxsteps it is a good thing.Clifford Wolf2015-02-21
* Added "sat -tempinduct-baseonly -tempinduct-inductonly"Clifford Wolf2015-02-21
* Fixed basecase init for "sat -tempinduct"Clifford Wolf2015-02-21
* Fixed "flatten" for non-pre-derived modulesClifford Wolf2015-02-21
* Hotfix for yosysjs/demo03.htmlClifford Wolf2015-02-21
* YosysJS: Wait for Viz to loadClifford Wolf2015-02-21
* Replaced ezDefaultSAT with ezSatPtrClifford Wolf2015-02-21
* Catch constants assigned to cell outputs in "flatten"Clifford Wolf2015-02-21
* Added deep recursion warning to AST simplifyClifford Wolf2015-02-20
* Parser support for complex delay expressionsClifford Wolf2015-02-20
* YosysJS firefox fixesClifford Wolf2015-02-19
* YosysJS stuffClifford Wolf2015-02-19
* format fixes in "sat -dump_json"Clifford Wolf2015-02-19
* Added "sat -dump_json" (WaveJSON format)Clifford Wolf2015-02-19
* Changed "show" defaults for Win32Clifford Wolf2015-02-19
* Convert floating point cell parameters to stringsClifford Wolf2015-02-18
* Fixed clang (svn trunk) warningsClifford Wolf2015-02-18
* Merge branch 'master' of github.com:cliffordwolf/yosysClifford Wolf2015-02-18
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| * wreduce help typo fixClifford Wolf2015-02-17
| * CodingReadmeClifford Wolf2015-02-17
* | Added "select %xe %cie %coe"Clifford Wolf2015-02-18
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* YosysJS fixes for firefoxClifford Wolf2015-02-16
* More YosysJS stuffClifford Wolf2015-02-16
* Added YosysJS wrapperClifford Wolf2015-02-16
* Bugfix in wreduceClifford Wolf2015-02-16
* More yosys.js improvementsClifford Wolf2015-02-16
* Added Viz to yosys.jsClifford Wolf2015-02-15
* Added yosys.js FS supportClifford Wolf2015-02-15
* More emcc stuffClifford Wolf2015-02-15
* Improved yosys.js exampleClifford Wolf2015-02-15
* Added "stat" to "synth" and "synth_xilinx"Clifford Wolf2015-02-15
* Added final checks to "synth" and "synth_xilinx"Clifford Wolf2015-02-15
* Added "check -noinit"Clifford Wolf2015-02-15
* Cosmetic fixes in "hierarchy" for blackbox modulesClifford Wolf2015-02-15
* More emscripten stuff, Added example appClifford Wolf2015-02-15
* Fixed default EMCCFLAGSClifford Wolf2015-02-15
* Smaller default parameters in $mem simlib modelClifford Wolf2015-02-15
* Fixed "stat" handling of blackbox modulesClifford Wolf2015-02-14
* Various fixes for memories with offsetsClifford Wolf2015-02-14
* Added $meminit support to "memory" commandClifford Wolf2015-02-14
* Added $meminit test caseClifford Wolf2015-02-14
* Added "read_verilog -nomeminit" and "nomeminit" attributeClifford Wolf2015-02-14
* Creating $meminit cells in verilog front-endClifford Wolf2015-02-14
* Added $meminit cell typeClifford Wolf2015-02-14
* Fixed handling of "//" in filenames in verilog pre-processorClifford Wolf2015-02-14