yosys - Debian dgit repo for package yosys

	Commit message (Expand)	Author	Age
*	Supercell creation for $div/$mod worked all along, fixed test benches	Clifford Wolf	2014-07-20
*	Improved tests/share/generate.py	Clifford Wolf	2014-07-20
*	Fixed creation of shift supercells in "share" pass	Clifford Wolf	2014-07-20
*	Small fix in tests/vloghtb/run-test.sh	Clifford Wolf	2014-07-20
*	Activated tests/share in "make test"	Clifford Wolf	2014-07-20
*	Added "miter -equiv -flatten"	Clifford Wolf	2014-07-20
*	Added call_on_selection() and call_on_module() API	Clifford Wolf	2014-07-20
*	Added tests/vloghtb/test_share.sh	Clifford Wolf	2014-07-20
*	Added tests/share for testing "share" supercell creation	Clifford Wolf	2014-07-20
*	Added "share" supercell creation	Clifford Wolf	2014-07-20
*	Added removing of always inactive cells to "share" pass	Clifford Wolf	2014-07-20
*	Progress in "share" pass	Clifford Wolf	2014-07-20
*	Added std::set<RTLIL::SigBit> to RTLIL::SigSpec conversion	Clifford Wolf	2014-07-20
*	Added SIZE() macro	Clifford Wolf	2014-07-20
*	Added log_cell()	Clifford Wolf	2014-07-20
*	Progress in "share" pass	Clifford Wolf	2014-07-20
*	Added tests/vloghtb	Clifford Wolf	2014-07-20
*	Use functions instead of always blocks for $mux/$pmux/$safe_pmux in verilog b...	Clifford Wolf	2014-07-20
*	Added support for $bu0 to verilog backend	Clifford Wolf	2014-07-20
*	Started to implement real resource sharing	Clifford Wolf	2014-07-19
*	Fixed log_id() memory corruption	Clifford Wolf	2014-07-19
*	Improved memory_share log messages	Clifford Wolf	2014-07-19
*	More verbose memory_share help message	Clifford Wolf	2014-07-19
*	Added SAT-based write-port sharing to memory_share	Clifford Wolf	2014-07-19
*	Added ModWalker helper class	Clifford Wolf	2014-07-19
*	Some "const" cleanups in SigMap	Clifford Wolf	2014-07-19
*	Fixed bug in memory_share feedback-to-en code	Clifford Wolf	2014-07-19
*	Added translation from read-feedback to en-signals in memory_share	Clifford Wolf	2014-07-18
*	Improved seeding of color rng in show command	Clifford Wolf	2014-07-18
*	Only create collision detect logic in memory_share if necessary	Clifford Wolf	2014-07-18
*	Bugfix in tests/memories/run-test.sh	Clifford Wolf	2014-07-18
*	added tests/memories	Clifford Wolf	2014-07-18
*	Added memory_share	Clifford Wolf	2014-07-18
*	Added automatic conversion from RTLIL::SigSpec to std::vector<RTLIL::SigBit>	Clifford Wolf	2014-07-18
*	Apply opt_reduce WR_EN opts to the whole mux tree driving the WR_EN port	Clifford Wolf	2014-07-18
*	Added function-like cell creation helpers	Clifford Wolf	2014-07-18
*	Added log_id() helper function	Clifford Wolf	2014-07-18
*	Also simulate unmapped memories in "make test"	Clifford Wolf	2014-07-17
*	Implemented dynamic bit-/part-select for memory writes	Clifford Wolf	2014-07-17
*	Fixed simlib.v model for $mem	Clifford Wolf	2014-07-17
*	Added support for bit/part select to mem2reg rewriter	Clifford Wolf	2014-07-17
*	Added support for constant bit- or part-select for memory writes	Clifford Wolf	2014-07-17
*	Improved opt_reduce handling of mem wr_en mux bits	Clifford Wolf	2014-07-17
*	Fixed RTLIL::SigSpec::append_bit() for appending constants	Clifford Wolf	2014-07-17
*	Added support for "blackbox" attribute to iopadmap	Clifford Wolf	2014-07-17
*	Added support for "blackbox" attribute to flatten/techmap	Clifford Wolf	2014-07-17
*	Added "inout" ports support to read_liberty	Clifford Wolf	2014-07-16
*	Set blackbox attribute in "read_liberty -lib"	Clifford Wolf	2014-07-16
*	Fixed spelling of "direction" in read_liberty messages	Clifford Wolf	2014-07-16
*	Merged new $mem/$memwr WR_EN interface	Clifford Wolf	2014-07-16
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