yosys - Debian dgit repo for package yosys

	Commit message (Expand)	Author	Age
...
*	Added nosync attribute and some async reset related fixes	Clifford Wolf	2013-03-25
*	Improved verbose output of subcircuit	Clifford Wolf	2013-03-25
*	Improved method for finding fsm_expand candidates	Clifford Wolf	2013-03-25
*	Added hierarchy -generate command for generating skeletton modules	Clifford Wolf	2013-03-25
*	Changed fsm_expand to merge multiplexers more aggressively	Clifford Wolf	2013-03-24
*	Renamed hansimem.v test case to mem_arst.v	Clifford Wolf	2013-03-24
*	Fixed handling of show -viewer	Clifford Wolf	2013-03-24
*	Fixed handling of internal signals in show command	Clifford Wolf	2013-03-24
*	Improved show -colors color assignments	Clifford Wolf	2013-03-24
*	Added show -strech and renamed -widthlabels to -width	Clifford Wolf	2013-03-24
*	Added -widthlabels options to chow command	Clifford Wolf	2013-03-24
*	Added -notypes option to intersynth backend	Clifford Wolf	2013-03-24
*	Reorganized TODOs	Clifford Wolf	2013-03-24
*	Added mem2reg option to verilog frontend	Clifford Wolf	2013-03-24
*	Fixed stdcells.v for $adff with undef reset value	Clifford Wolf	2013-03-24
*	Another fix in mem2reg ast simplify logic	Clifford Wolf	2013-03-24
*	Added -colors option to show command	Clifford Wolf	2013-03-24
*	Added hansimem testcase (memory with async reset)	Clifford Wolf	2013-03-24
*	Improved mem2reg handling in ast simplifier	Clifford Wolf	2013-03-24
*	Fixed gcc build (intersynth backend)	Clifford Wolf	2013-03-23
*	Tiny fixes to verilog parser	Clifford Wolf	2013-03-23
*	Various improvements in intersynth backend	Clifford Wolf	2013-03-23
*	Added intersynth backend	Clifford Wolf	2013-03-23
*	Added help -write-tex-command-reference-manual option	Clifford Wolf	2013-03-21
*	Added eclipse CDT project files to .gitignore	Clifford Wolf	2013-03-21
*	Added -S option for simple synthesis to gate logic	Clifford Wolf	2013-03-21
*	Avoid verilog-2k in verilog backend	Clifford Wolf	2013-03-21
*	Disabled the per-default dumping of ILANG code	Clifford Wolf	2013-03-21
*	Added -nomap option to memory pass	Clifford Wolf	2013-03-21
*	Merge branch 'hansiglaser-master'	Clifford Wolf	2013-03-19
\|\
\| *	added optimizations for single-bit $eq/$ne with constant input to opt_const	Clifford Wolf	2013-03-19
\| *	improved $mux optimization in opt_const	Clifford Wolf	2013-03-19
\| *	keep $mux and $_MUX_ optimizations separate in opt_const	Clifford Wolf	2013-03-19
\| *	added a TODO	Johann Glaser	2013-03-18
\| *	added one more suggestion to optimize MUXes in pass "opt_const"	Johann Glaser	2013-03-18
\| *	also optimize single-bit "$mux" cells in pass "opt_const", added suggestions	Johann Glaser	2013-03-18
\| *	fixed a crash when lines start with whitespace	Johann Glaser	2013-03-18
\| *	added description of Makefile include files for build configuration	Johann Glaser	2013-03-18
\|/
*	More TODOs in README	Clifford Wolf	2013-03-18
*	Merge branch 'hansi'	Clifford Wolf	2013-03-18
\|\
\| *	Removed date from auto-generated passes/techmap/stdcells.inc	Clifford Wolf	2013-03-18
\| *	Fixed abc eeror handling	Clifford Wolf	2013-03-18
\| *	add header to autogenerated file on its origin	Johann Glaser	2013-03-18
\| *	fixed typos	Johann Glaser	2013-03-18
\|/
*	Fixed strerrno vs. strerror types in ABC pass	Clifford Wolf	2013-03-17
*	Merge branch 'hansi'	Clifford Wolf	2013-03-17
\|\
\| *	Cleaned up ABC file/io error handling	Clifford Wolf	2013-03-17
\| *	Set execute bit on tests/openmsp430/run-synth.sh for real	Clifford Wolf	2013-03-17
\| *	added error checking at execution of ABC	Johann Glaser	2013-03-17
\| *	corrected typos	Johann Glaser	2013-03-17