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* Added note about SystemVerilog assert statement to READMEClifford Wolf2014-02-01
* Tiny change in example script in READMEClifford Wolf2014-01-29
* Fixes and other changes in READMEClifford Wolf2013-12-08
* Tighter integration of ABC buildClifford Wolf2013-11-27
* Updated TODOsClifford Wolf2013-11-24
* Added "top" attribute to mark top module in hierarchyClifford Wolf2013-11-24
* Renamed "placeholder" to "blackbox"Clifford Wolf2013-11-22
* Enable {* .. *} feature per default (removes dependency to REJECT feature in ...Clifford Wolf2013-11-22
* Implemented indexed part selectsClifford Wolf2013-11-20
* Fixed name resolution of local tasks and functions in generate blockClifford Wolf2013-11-20
* Implemented part/bit select on memory readClifford Wolf2013-11-20
* Updated TODOs in README fileClifford Wolf2013-11-20
* Added init= attribute for fpga-style reset valuesClifford Wolf2013-11-20
* Removed done or obsolete TODO itemsClifford Wolf2013-11-07
* Added support for "keep" attributes on wiresClifford Wolf2013-11-05
* Added roadmap to readme fileClifford Wolf2013-11-02
* Added paragraph to README file to avoid mycells.lib confusionClifford Wolf2013-10-31
* README file typo fixClifford Wolf2013-10-31
* Some additions to the README fileClifford Wolf2013-10-31
* Added iopadmap passClifford Wolf2013-10-16
* Added recommended apt-get commands to READMEClifford Wolf2013-10-11
* Updated TODO section in READMEClifford Wolf2013-08-01
* Added web site link to READMEClifford Wolf2013-07-21
* Added ast frontend refactoring to TODOClifford Wolf2013-07-11
* Documentation updatesClifford Wolf2013-07-04
* Added "make abc" and "make install-abc"Clifford Wolf2013-06-08
* Fixed README for new show command behavior (svg vs. ps)Clifford Wolf2013-04-27
* Implemented TCL support (only via -c option at the moment)Clifford Wolf2013-03-28
* Implemented proper handling of stub placeholder modulesClifford Wolf2013-03-28
* Added nosync attribute and some async reset related fixesClifford Wolf2013-03-25
* Reorganized TODOsClifford Wolf2013-03-24
* Added mem2reg option to verilog frontendClifford Wolf2013-03-24
* added a TODOJohann Glaser2013-03-18
* added description of Makefile include files for build configurationJohann Glaser2013-03-18
* More TODOs in READMEClifford Wolf2013-03-18
* corrected typosJohann Glaser2013-03-17
* Added help messages to ilang and verilog frontendsClifford Wolf2013-03-01
* Added more help messagesClifford Wolf2013-03-01
* Added help command to README (and some other README changes)Clifford Wolf2013-02-28
* Added some additional TODO itemsClifford Wolf2013-02-27
* Fixed typo in READMEClifford Wolf2013-02-27
* Added copyright statement to readme fileClifford Wolf2013-02-27
* Added support for "always @(*)"Clifford Wolf2013-01-16
* Added "getting started" section to READMEClifford Wolf2013-01-06
* initial importClifford Wolf2013-01-05