| Commit message (Expand) | Author | Age | |
|---|---|---|---|
| * | Renamed "write_autotest" to "test_autotb" and moved to passes/tests/ | Clifford Wolf | 2014-07-29 |
| * | Refactoring: Renamed RTLIL::Design::modules to modules_ | Clifford Wolf | 2014-07-27 |
| * | Refactoring: Renamed RTLIL::Module::wires to wires_ | Clifford Wolf | 2014-07-27 |
| * | Replaced more old SigChunk programming patterns | Clifford Wolf | 2014-07-24 |
| * | SigSpec refactoring: using the accessor functions everywhere | Clifford Wolf | 2014-07-22 |
| * | SigSpec refactoring: renamed chunks and width to __chunks and __width | Clifford Wolf | 2014-07-22 |
| * | Fixed gentb_constant handling in autotest backend | Clifford Wolf | 2013-12-04 |
| * | Added modelsim support to autotest | Clifford Wolf | 2013-11-24 |
| * | Added support for complex set-reset flip-flops in proc_dff | Clifford Wolf | 2013-10-24 |
| * | Fixed handling of boolean attributes (backends) | Clifford Wolf | 2013-10-24 |
| * | Added more help messages | Clifford Wolf | 2013-03-01 |
| * | initial import | Clifford Wolf | 2013-01-05 |
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