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path: root/frontends/ast/ast.h
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* Added "design" command (-reset, -save, -load)Clifford Wolf2013-07-27
* Major redesign of expr width/sign detecion (verilog/ast frontend)Clifford Wolf2013-07-09
* Added defparam support to Verilog/AST frontendClifford Wolf2013-07-04
* Enabled AST/Verilog front-end optimizations per defaultClifford Wolf2013-06-10
* Now only use value from "initial" when no matching "always" block is foundClifford Wolf2013-03-31
* Added AST_INITIAL (before verilog "initial" was mapped to AST_ALWAYS)Clifford Wolf2013-03-31
* Implemented proper handling of stub placeholder modulesClifford Wolf2013-03-28
* Added nosync attribute and some async reset related fixesClifford Wolf2013-03-25
* Added mem2reg option to verilog frontendClifford Wolf2013-03-24
* Improved mem2reg handling in ast simplifierClifford Wolf2013-03-24
* Added support for verilog genblock[index].member syntaxClifford Wolf2013-02-26
* initial importClifford Wolf2013-01-05