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* Fixed build of verific bindingsClifford Wolf2014-07-31
* Added module->design and cell->module, wire->module pointersClifford Wolf2014-07-31
* Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespaceClifford Wolf2014-07-31
* Using log_assert() instead of assert()Clifford Wolf2014-07-28
* Fixed verific bindings for new RTLIL apiClifford Wolf2014-07-27
* Updated verific build/test instructionsClifford Wolf2014-07-25
* Various fixes in Verific frontend for new RTLIL APIClifford Wolf2014-07-23
* Fixed mapping of Verific WIDE_DFFRS operatorClifford Wolf2014-03-20
* Fixed mapping of Verific FADD primitive with unconnected outputsClifford Wolf2014-03-20
* Progress in Verific bindingsClifford Wolf2014-03-17
* Progress in Verific bindingsClifford Wolf2014-03-17
* Progress in Verific bindingsClifford Wolf2014-03-17
* Added support for memories to verific bindingsClifford Wolf2014-03-16
* Use Verific Net::{IsGnd,IsPwr} API in Verific bindingsClifford Wolf2014-03-16
* Progress in Verific bindingsClifford Wolf2014-03-15
* Progress in Verific bindingsClifford Wolf2014-03-15
* Progress in Verific bindingsClifford Wolf2014-03-15
* Progress in Verific bindingsClifford Wolf2014-03-14
* Progress in Verific bindingsClifford Wolf2014-03-14
* Progress in Verific bindingsClifford Wolf2014-03-13
* Copy Verific vdbs files to Yosys "share" data directoryClifford Wolf2014-03-13
* Added test_navre.ys for verific frontendClifford Wolf2014-03-13
* Improved verific command (added support for some operators)Clifford Wolf2014-03-10
* Improvements in verific commandClifford Wolf2014-03-10
* Added "verific" commandClifford Wolf2014-03-09