index
:
yosys
master
Debian dgit repo for package yosys
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
frontends
/
verilog
/
const2ast.cc
Commit message (
Collapse
)
Author
Age
*
New upstream version 0.9
Ruben Undheim
2019-10-18
|
*
New upstream version 0.7+20180830git0b7a184
Ruben Undheim
2018-08-30
|
*
Fixed segfault on invalid verilog constant 1'b_
Clifford Wolf
2015-09-22
|
*
Small corrections to const2ast warning messages
Clifford Wolf
2015-08-17
|
*
Check base-n literals only contain valid digits
Florian Zeitz
2015-08-17
|
*
Warn on literals exceeding the specified bit width
Florian Zeitz
2015-08-17
|
*
Another block of spelling fixes
Larry Doolittle
2015-08-14
|
|
|
|
Smaller this time
*
Fixed handling of [a-fxz?] in decimal constants
Clifford Wolf
2015-08-11
|
*
Fixed trailing whitespaces
Clifford Wolf
2015-07-02
|
*
Fixed two minor bugs in constant parsing
Clifford Wolf
2014-11-24
|
*
Added warning for use of 'z' constants in HDL
Clifford Wolf
2014-11-14
|
*
Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespace
Clifford Wolf
2014-07-31
|
*
Using log_assert() instead of assert()
Clifford Wolf
2014-07-28
|
*
Improved parsing of large integer constants
Clifford Wolf
2014-06-15
|
*
Fixed handling of unsized constants in verilog frontend
Clifford Wolf
2014-01-24
|
*
Major redesign of expr width/sign detecion (verilog/ast frontend)
Clifford Wolf
2013-07-09
|
*
Added SAT generator and simple sat_solve command
Clifford Wolf
2013-06-07
|
*
initial import
Clifford Wolf
2013-01-05