summaryrefslogtreecommitdiff
path: root/frontends/verilog/verilog_parser.y
Commit message (Expand)AuthorAge
* Fixed supply0/supply1 with many wiresClifford Wolf2014-12-11
* Added warning for use of 'z' constants in HDLClifford Wolf2014-11-14
* Fixed parsing of nested verilog concatenation and replicateClifford Wolf2014-11-12
* Fixed parsing of "module mymod #( parameter foo = 1, bar = 2 ..."Clifford Wolf2014-10-30
* Added support for task and function args in parenthesesClifford Wolf2014-10-27
* Updated lexers & parsers to include prefixesWilliam Speirs2014-10-15