Commit message (Expand) | Author | Age | |
---|---|---|---|
* | Added AST_INITIAL (before verilog "initial" was mapped to AST_ALWAYS) | Clifford Wolf | 2013-03-31 |
* | Implemented proper handling of stub placeholder modules | Clifford Wolf | 2013-03-28 |
* | Improvements and bugfixes for generate blocks with local signals | Clifford Wolf | 2013-03-26 |
* | Added mem2reg option to verilog frontend | Clifford Wolf | 2013-03-24 |
* | Tiny fixes to verilog parser | Clifford Wolf | 2013-03-23 |
* | Added help messages to ilang and verilog frontends | Clifford Wolf | 2013-03-01 |
* | Moved stand-alone libs to libs/ directory and added libs/subcircuit | Clifford Wolf | 2013-02-27 |
* | Added support for verilog genblock[index].member syntax | Clifford Wolf | 2013-02-26 |
* | Added support for "always @(*)" | Clifford Wolf | 2013-01-16 |
* | added .gitignore files | Clifford Wolf | 2013-01-05 |
* | initial import | Clifford Wolf | 2013-01-05 |