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* Ignoring more system task and functionsClifford Wolf2015-01-15
* Fixed handling of "input foo; reg [0:0] foo;"Clifford Wolf2015-01-15
* Consolidate "Blocking assignment to memory.." msgs for the same lineClifford Wolf2015-01-15
* Enable bison to be customizedFabio Utzig2015-01-08
* Define YOSYS and SYNTHESIS in preprocClifford Wolf2015-01-02
* Fixed memory->start_offset handlingClifford Wolf2015-01-01
* Added global yosys_celltypesClifford Wolf2014-12-29
* dict/pool changes in astClifford Wolf2014-12-29
* Changed more code to dict<> and pool<>Clifford Wolf2014-12-28
* Improved some warning messagesClifford Wolf2014-12-27
* Fixed mem2reg warning messageClifford Wolf2014-12-27
* Added Yosys::{dict,nodict,vector} container typesClifford Wolf2014-12-26
* Renamed extend() to extend_xx(), changed most users to extend_u0()Clifford Wolf2014-12-24
* Fixed supply0/supply1 with many wiresClifford Wolf2014-12-11
* Fixed minor bug in parsing delaysClifford Wolf2014-11-24
* Fixed two minor bugs in constant parsingClifford Wolf2014-11-24
* Added warning for use of 'z' constants in HDLClifford Wolf2014-11-14
* Fixed parsing of nested verilog concatenation and replicateClifford Wolf2014-11-12
* Added log_warning() APIClifford Wolf2014-11-09
* Added "ENABLE_PLUGINS := 0" to verific amd64 build instructionsClifford Wolf2014-11-08
* Fixed parsing of "module mymod #( parameter foo = 1, bar = 2 ..."Clifford Wolf2014-10-30
* AST simplifier: optimize constant AST_CASE nodes before recursively descendingClifford Wolf2014-10-29
* Added support for task and function args in parenthesesClifford Wolf2014-10-27
* Improvements in $readmem[bh] implementationClifford Wolf2014-10-26
* Added support for $readmemh/$readmembClifford Wolf2014-10-26
* Fixed constant "cond ? string1 : string2" with strings of different sizeClifford Wolf2014-10-25
* Re-introduced Yosys::readsome() helper functionClifford Wolf2014-10-23
* minor indenting correctionsClifford Wolf2014-10-19
* Builds on Mac 10.9.2 with LLVM 3.5.Parviz Palangpour2014-10-19
* Fixed various VS warningsClifford Wolf2014-10-18
* Header changes so it will compile on VSWilliam Speirs2014-10-17
* Wrapped math in int constructorWilliam Speirs2014-10-17
* Print "SystemVerilog" in "read_verilog -sv" log messagesClifford Wolf2014-10-16
* Fixed handling of invalid array access in mem2reg codeClifford Wolf2014-10-16
* Updated .gitignore file for ilang and verilog frontendsClifford Wolf2014-10-15
* Replaced readsome() with read() and gcount()Clifford Wolf2014-10-15
* Updated lexers & parsers to include prefixesWilliam Speirs2014-10-15
* Added make_temp_{file,dir}() and remove_directory() APIsClifford Wolf2014-10-12
* Added run_command() api to replace system() and popen()Clifford Wolf2014-10-12
* Do not the 'z' modifier in format string (another win32 fix)Clifford Wolf2014-10-11
* Fixed win32 troubles with f.readsome()Clifford Wolf2014-10-11
* Disabled vhdl2verilog command for win32 buildsClifford Wolf2014-10-11
* Added format __attribute__ to stringf()Clifford Wolf2014-10-10
* Renamed SIZE() to GetSize() because of name collision on Win32Clifford Wolf2014-10-10
* namespace YosysClifford Wolf2014-09-27
* Another $clog2 bugfixClifford Wolf2014-09-08
* Fixed $clog2 (off by one error)Clifford Wolf2014-09-06
* Fixed assignment of out-of bounds array elementClifford Wolf2014-09-06
* Corrected spelling mistakes found by lintianRuben Undheim2014-09-06
* Removed $bu0 cell typeClifford Wolf2014-09-04