yosys - Debian dgit repo for package yosys

	Commit message (Expand)	Author	Age
*	Added "inout" ports support to read_liberty	Clifford Wolf	2014-07-16
*	Set blackbox attribute in "read_liberty -lib"	Clifford Wolf	2014-07-16
*	Fixed spelling of "direction" in read_liberty messages	Clifford Wolf	2014-07-16
*	changes in verilog frontend for new $mem/$memwr WR_EN interface	Clifford Wolf	2014-07-16
*	Added passing of various options to vhdl2verilog	Clifford Wolf	2014-07-12
*	Fixed processing of initial values for block-local variables	Clifford Wolf	2014-07-11
*	fixed parsing of constant with comment between size and value	Clifford Wolf	2014-07-02
*	Fixed handling of mixed real/int ternary expressions	Clifford Wolf	2014-06-25
*	More found_real-related fixes to AstNode::detectSignWidthWorker	Clifford Wolf	2014-06-24
*	fixed signdness detection for expressions with reals	Clifford Wolf	2014-06-21
*	Added AstNode::MEM2REG_FL_CMPLX_LHS	Clifford Wolf	2014-06-17
*	Improved handling of relational op of real values	Clifford Wolf	2014-06-17
*	Improved ternary support for real values	Clifford Wolf	2014-06-16
*	Use undef (x/z vs. NaN) rules for real values from IEEE Std 1800-2012	Clifford Wolf	2014-06-16
*	Fixed parsing of TOK_INTEGER (implies TOK_SIGNED)	Clifford Wolf	2014-06-16
*	Added found_real feature to AstNode::detectSignWidth	Clifford Wolf	2014-06-16
*	Improved AstNode::realAsConst for large numbers	Clifford Wolf	2014-06-15
*	Improved parsing of large integer constants	Clifford Wolf	2014-06-15
*	Improved AstNode::asReal for large integers	Clifford Wolf	2014-06-15
*	improved (fixed) conversion of real values to bit vectors	Clifford Wolf	2014-06-14
*	Fixed relational operators for const real expressions	Clifford Wolf	2014-06-14
*	Added support for math functions	Clifford Wolf	2014-06-14
*	Added handling of real-valued parameters/localparams	Clifford Wolf	2014-06-14
*	Implemented more real arithmetic	Clifford Wolf	2014-06-14
*	Implemented basic real arithmetic	Clifford Wolf	2014-06-14
*	Added real->int convertion in ast genrtlil	Clifford Wolf	2014-06-14
*	Added Verilog lexer and parser support for real values	Clifford Wolf	2014-06-13
*	Added read_verilog -sv options, added support for bit, logic,	Clifford Wolf	2014-06-12
*	Add support for cell arrays	Clifford Wolf	2014-06-07
*	Added support for repeat stmt in const functions	Clifford Wolf	2014-06-07
*	further improved const function support	Clifford Wolf	2014-06-07
*	made the generate..endgenrate keywords optional	Clifford Wolf	2014-06-06
*	improved const function support	Clifford Wolf	2014-06-06
*	fix functions with no block (but single statement, loop, etc.)	Clifford Wolf	2014-06-06
*	improved ast simplify of const functions	Clifford Wolf	2014-06-06
*	added while and repeat support to verilog parser	Clifford Wolf	2014-06-06
*	Improved error message for options after front-end filename arguments	Clifford Wolf	2014-06-04
*	new flags -ignore_miss_func and -ignore_miss_dir for read_liberty	Johann Glaser	2014-05-28
*	Fixed clang -Wdeprecated-register warnings	Clifford Wolf	2014-04-20
*	Replaced depricated %name-prefix= bison directive	Clifford Wolf	2014-04-20
*	Fixed mapping of Verific WIDE_DFFRS operator	Clifford Wolf	2014-03-20
*	Fixed mapping of Verific FADD primitive with unconnected outputs	Clifford Wolf	2014-03-20
*	Progress in Verific bindings	Clifford Wolf	2014-03-17
*	Progress in Verific bindings	Clifford Wolf	2014-03-17
*	Progress in Verific bindings	Clifford Wolf	2014-03-17
*	Added support for memories to verific bindings	Clifford Wolf	2014-03-16
*	Use Verific Net::{IsGnd,IsPwr} API in Verific bindings	Clifford Wolf	2014-03-16
*	Progress in Verific bindings	Clifford Wolf	2014-03-15
*	Progress in Verific bindings	Clifford Wolf	2014-03-15
*	Progress in Verific bindings	Clifford Wolf	2014-03-15