yosys - Debian dgit repo for package yosys

	Commit message (Expand)	Author	Age
*	Fixed mapping of Verific WIDE_DFFRS operator	Clifford Wolf	2014-03-20
*	Fixed mapping of Verific FADD primitive with unconnected outputs	Clifford Wolf	2014-03-20
*	Progress in Verific bindings	Clifford Wolf	2014-03-17
*	Progress in Verific bindings	Clifford Wolf	2014-03-17
*	Progress in Verific bindings	Clifford Wolf	2014-03-17
*	Added support for memories to verific bindings	Clifford Wolf	2014-03-16
*	Use Verific Net::{IsGnd,IsPwr} API in Verific bindings	Clifford Wolf	2014-03-16
*	Progress in Verific bindings	Clifford Wolf	2014-03-15
*	Progress in Verific bindings	Clifford Wolf	2014-03-15
*	Progress in Verific bindings	Clifford Wolf	2014-03-15
*	Progress in Verific bindings	Clifford Wolf	2014-03-14
*	Progress in Verific bindings	Clifford Wolf	2014-03-14
*	Progress in Verific bindings	Clifford Wolf	2014-03-13
*	Copy Verific vdbs files to Yosys "share" data directory	Clifford Wolf	2014-03-13
*	Added test_navre.ys for verific frontend	Clifford Wolf	2014-03-13
*	Merged OSX fixes from Siesh1oo with some modifications	Clifford Wolf	2014-03-13
*	Merged a few fixes for non-posix systems from github.com/Siesh1oo/yosys	Clifford Wolf	2014-03-11
*	Added support for `line compiler directive	Clifford Wolf	2014-03-11
*	Improved verific command (added support for some operators)	Clifford Wolf	2014-03-10
*	Improvements in verific command	Clifford Wolf	2014-03-10
*	Added "verific" command	Clifford Wolf	2014-03-09
*	Bugfix in ilang frontend autoidx recovery	Clifford Wolf	2014-03-07
*	Fixed gcc compiler warning	Clifford Wolf	2014-03-06
*	Include id2ast pointers when dumping AST	Clifford Wolf	2014-03-05
*	Fixed merging of compatible wire decls in AST frontend	Clifford Wolf	2014-03-05
*	Bugfix in recursive AST simplification	Clifford Wolf	2014-03-05
*	Fixed vhdl2verilog temp dir name	Clifford Wolf	2014-03-01
*	Fixed vhdl2verilog help message	Clifford Wolf	2014-03-01
*	Fixed bit-extending in $mux argument (use $bu0 instead of $pos)	Clifford Wolf	2014-02-26
*	Don't blow up constants unneccessarily in Verilog frontend	Clifford Wolf	2014-02-24
*	Fixed bug in generation of undefs for $memwr MUXes	Clifford Wolf	2014-02-22
*	Added vhdl2verilog	Clifford Wolf	2014-02-21
*	Cleanups in handling of read_verilog -defer and -icells	Clifford Wolf	2014-02-20
*	Added Verilog support for "`default_nettype none"	Clifford Wolf	2014-02-17
*	Added a warning note about error reporting to read_verilog help message	Clifford Wolf	2014-02-16
*	Improved support for constant functions	Clifford Wolf	2014-02-16
*	Added ff and latch support to read_liberty	Clifford Wolf	2014-02-15
*	Bugfix in expression parser of read_liberty	Clifford Wolf	2014-02-15
*	Correctly convert constants to RTLIL (fixed undef handling)	Clifford Wolf	2014-02-15
*	Added liberty frontend	Clifford Wolf	2014-02-15
*	Be more conservative with new const-function code	Clifford Wolf	2014-02-14
*	Added support for FOR loops in function calls in parameters	Clifford Wolf	2014-02-14
*	Created basic support for function calls in parameter values	Clifford Wolf	2014-02-14
*	Implemented read_verilog -defer	Clifford Wolf	2014-02-13
*	Added support for functions returning integer	Clifford Wolf	2014-02-12
*	renamed ilang "scope error" to "ilang error"	Clifford Wolf	2014-02-11
*	Improved ilang parser error messages	Clifford Wolf	2014-02-09
*	Fixed gcc compiler warnings with release build	Clifford Wolf	2014-02-06
*	Added read_verilog -setattr	Clifford Wolf	2014-02-05
*	Fixed bug in sequential sat proofs and improved handling of asserts	Clifford Wolf	2014-02-04