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* Fixed a bug in AST frontend for cases with non-blocking assigned variables ↵Clifford Wolf2013-04-13
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* Now only use value from "initial" when no matching "always" block is foundClifford Wolf2013-03-31
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* Added AST_INITIAL (before verilog "initial" was mapped to AST_ALWAYS)Clifford Wolf2013-03-31
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* Implemented proper handling of stub placeholder modulesClifford Wolf2013-03-28
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* Improvements and bugfixes for generate blocks with local signalsClifford Wolf2013-03-26
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* Fixed handling of unconditional generate blocksClifford Wolf2013-03-26
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* Added nosync attribute and some async reset related fixesClifford Wolf2013-03-25
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* Added mem2reg option to verilog frontendClifford Wolf2013-03-24
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* Another fix in mem2reg ast simplify logicClifford Wolf2013-03-24
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* Improved mem2reg handling in ast simplifierClifford Wolf2013-03-24
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* Tiny fixes to verilog parserClifford Wolf2013-03-23
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* Added help messages to ilang and verilog frontendsClifford Wolf2013-03-01
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* Moved stand-alone libs to libs/ directory and added libs/subcircuitClifford Wolf2013-02-27
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* Added support for verilog genblock[index].member syntaxClifford Wolf2013-02-26
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* Added support for "always @(*)"Clifford Wolf2013-01-16
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* added .gitignore filesClifford Wolf2013-01-05
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* initial importClifford Wolf2013-01-05