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kernel
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rtlil.h
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Age
*
Fixed handling of boolean attributes (passes)
Clifford Wolf
2013-10-24
*
Fixed handling of boolean attributes (kernel)
Clifford Wolf
2013-10-24
*
Changed NEW_WIRE API to return the wire, not the signal
Clifford Wolf
2013-10-18
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Added RTLIL NEW_WIRE macro
Clifford Wolf
2013-10-18
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Added techmap -opt mode
Clifford Wolf
2013-08-09
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Some fixes to improve determinism
Clifford Wolf
2013-08-09
*
Added "design" command (-reset, -save, -load)
Clifford Wolf
2013-07-27
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Added "eval" pass
Clifford Wolf
2013-06-19
*
Fixed build with clang
Clifford Wolf
2013-06-18
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Added RTLIL::Module::fixup_ports() API and RTLIL::*::rewrite_sigspecs() API
Clifford Wolf
2013-06-18
*
Added "dump" command (part ilang backend)
Clifford Wolf
2013-06-02
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Improved opt_share for reduce cells
Clifford Wolf
2013-03-29
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Added design->select() api and use it in extract pass
Clifford Wolf
2013-03-03
*
Added id2cstr API
Clifford Wolf
2013-03-01
*
Do not unescape identifiers starting with \$
Clifford Wolf
2013-03-01
*
initial import
Clifford Wolf
2013-01-05