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kernel
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satgen.h
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Author
Age
*
Import more std:: stuff into Yosys namespace
Clifford Wolf
2015-10-25
*
Fixed trailing whitespaces
Clifford Wolf
2015-07-02
*
Added $assume cell type
Clifford Wolf
2015-02-26
*
Replaced ezDefaultSAT with ezSatPtr
Clifford Wolf
2015-02-21
*
Added "equiv_simple -undef"
Clifford Wolf
2015-01-31
*
Various equiv_simple improvements
Clifford Wolf
2015-01-22
*
Fixed a few VS warnings
Clifford Wolf
2014-10-17
*
Added format __attribute__ to stringf()
Clifford Wolf
2014-10-10
*
Renamed TRUE/FALSE to CONST_TRUE/CONST_FALSE because of name collision on Win32
Clifford Wolf
2014-10-10
*
Renamed SIZE() to GetSize() because of name collision on Win32
Clifford Wolf
2014-10-10
*
satgen import sigbit api
Clifford Wolf
2014-10-03
*
namespace Yosys
Clifford Wolf
2014-09-27
*
Simplified $fa undef model
Clifford Wolf
2014-09-08
*
Added $lcu cell type
Clifford Wolf
2014-09-08
*
Added "$fa" cell type
Clifford Wolf
2014-09-08
*
Added $macc SAT model
Clifford Wolf
2014-09-06
*
Removed $bu0 cell type
Clifford Wolf
2014-09-04
*
Using $pos models for $bu0
Clifford Wolf
2014-09-03
*
Fixes in $alu SAT- and eval-models
Clifford Wolf
2014-09-03
*
Small bug fixes in $not, $neg, and $shiftx models
Clifford Wolf
2014-09-02
*
Added SAT model for $alu cells
Clifford Wolf
2014-09-01
*
Added $lut support in test_cell, techmap, satgen
Clifford Wolf
2014-08-31
*
Added additional gate types: $_NAND_ $_NOR_ $_XNOR_ $_AOI3_ $_OAI3_ $_AOI4_ $...
Clifford Wolf
2014-08-16
*
Renamed $_INV_ cell type to $_NOT_
Clifford Wolf
2014-08-15
*
RIP $safe_pmux
Clifford Wolf
2014-08-14
*
Renamed port access function on RTLIL::Cell, added param access functions
Clifford Wolf
2014-07-31
*
Using native ezSAT shift ops in satgen, fixed $shift and $shiftx SAT models
Clifford Wolf
2014-07-30
*
Added $shift and $shiftx cell types (needed for correct part select behavior)
Clifford Wolf
2014-07-29
*
Using log_assert() instead of assert()
Clifford Wolf
2014-07-28
*
Changed users of cell->connections_ to the new API (sed command)
Clifford Wolf
2014-07-26
*
Renamed RTLIL::{Module,Cell}::connections to connections_
Clifford Wolf
2014-07-26
*
Removed RTLIL::SigSpec::expand() method
Clifford Wolf
2014-07-23
*
SigSpec refactoring: using the accessor functions everywhere
Clifford Wolf
2014-07-22
*
SigSpec refactoring: renamed chunks and width to __chunks and __width
Clifford Wolf
2014-07-22
*
Bugfix in satgen for cells with wider in- than outputs.
Clifford Wolf
2014-07-21
*
Added libs/minisat (copy of minisat git master)
Clifford Wolf
2014-03-12
*
Fixed use of frozen literals in SatGen
Clifford Wolf
2014-03-06
*
Strictly zero-extend unsigned A-inputs of shift operations
Clifford Wolf
2014-03-06
*
Added support for $bu0 to SatGen
Clifford Wolf
2014-02-26
*
Added support for Minisat::SimpSolver + ezSAT frezze() API
Clifford Wolf
2014-02-23
*
Added $slice and $concat cell types
Clifford Wolf
2014-02-07
*
Fixed bug in sequential sat proofs and improved handling of asserts
Clifford Wolf
2014-02-04
*
Added $assert support to satgen
Clifford Wolf
2014-01-19
*
Fixed SAT and ConstEval undef handling for $pmux and $safe_pmux
Clifford Wolf
2014-01-03
*
Added SAT undef model for $pmux and $safe_pmux
Clifford Wolf
2014-01-02
*
Major rewrite of "freduce" command
Clifford Wolf
2014-01-02
*
Fixed undef extend for bitwise binary ops (bugs in simplemap and satgen)
Clifford Wolf
2013-12-29
*
Fixed sat handling of $eqx and $nex with unequal port widths
Clifford Wolf
2013-12-27
*
Small cleanup in SatGen
Clifford Wolf
2013-12-27
*
Fixed sat handling of $eqx and $nex cells
Clifford Wolf
2013-12-27
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