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path: root/kernel/satgen.h
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* Fixed a few VS warningsClifford Wolf2014-10-17
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* Added format __attribute__ to stringf()Clifford Wolf2014-10-10
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* Renamed TRUE/FALSE to CONST_TRUE/CONST_FALSE because of name collision on Win32Clifford Wolf2014-10-10
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* Renamed SIZE() to GetSize() because of name collision on Win32Clifford Wolf2014-10-10
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* satgen import sigbit apiClifford Wolf2014-10-03
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* namespace YosysClifford Wolf2014-09-27
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* Simplified $fa undef modelClifford Wolf2014-09-08
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* Added $lcu cell typeClifford Wolf2014-09-08
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* Added "$fa" cell typeClifford Wolf2014-09-08
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* Added $macc SAT modelClifford Wolf2014-09-06
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* Removed $bu0 cell typeClifford Wolf2014-09-04
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* Using $pos models for $bu0Clifford Wolf2014-09-03
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* Fixes in $alu SAT- and eval-modelsClifford Wolf2014-09-03
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* Small bug fixes in $not, $neg, and $shiftx modelsClifford Wolf2014-09-02
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* Added SAT model for $alu cellsClifford Wolf2014-09-01
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* Added $lut support in test_cell, techmap, satgenClifford Wolf2014-08-31
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* Added additional gate types: $_NAND_ $_NOR_ $_XNOR_ $_AOI3_ $_OAI3_ $_AOI4_ ↵Clifford Wolf2014-08-16
| | | | $_OAI4_
* Renamed $_INV_ cell type to $_NOT_Clifford Wolf2014-08-15
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* RIP $safe_pmuxClifford Wolf2014-08-14
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* Renamed port access function on RTLIL::Cell, added param access functionsClifford Wolf2014-07-31
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* Using native ezSAT shift ops in satgen, fixed $shift and $shiftx SAT modelsClifford Wolf2014-07-30
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* Added $shift and $shiftx cell types (needed for correct part select behavior)Clifford Wolf2014-07-29
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* Using log_assert() instead of assert()Clifford Wolf2014-07-28
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* Changed users of cell->connections_ to the new API (sed command)Clifford Wolf2014-07-26
| | | | | | | | | git grep -l 'connections_' | xargs sed -i -r -e ' s/(->|\.)connections_\["([^"]*)"\] = (.*);/\1set("\2", \3);/g; s/(->|\.)connections_\["([^"]*)"\]/\1get("\2")/g; s/(->|\.)connections_.at\("([^"]*)"\)/\1get("\2")/g; s/(->|\.)connections_.push_back/\1connect/g; s/(->|\.)connections_/\1connections()/g;'
* Renamed RTLIL::{Module,Cell}::connections to connections_Clifford Wolf2014-07-26
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* Removed RTLIL::SigSpec::expand() methodClifford Wolf2014-07-23
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* SigSpec refactoring: using the accessor functions everywhereClifford Wolf2014-07-22
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* SigSpec refactoring: renamed chunks and width to __chunks and __widthClifford Wolf2014-07-22
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* Bugfix in satgen for cells with wider in- than outputs.Clifford Wolf2014-07-21
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* Added libs/minisat (copy of minisat git master)Clifford Wolf2014-03-12
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* Fixed use of frozen literals in SatGenClifford Wolf2014-03-06
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* Strictly zero-extend unsigned A-inputs of shift operationsClifford Wolf2014-03-06
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* Added support for $bu0 to SatGenClifford Wolf2014-02-26
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* Added support for Minisat::SimpSolver + ezSAT frezze() APIClifford Wolf2014-02-23
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* Added $slice and $concat cell typesClifford Wolf2014-02-07
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* Fixed bug in sequential sat proofs and improved handling of assertsClifford Wolf2014-02-04
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* Added $assert support to satgenClifford Wolf2014-01-19
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* Fixed SAT and ConstEval undef handling for $pmux and $safe_pmuxClifford Wolf2014-01-03
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* Added SAT undef model for $pmux and $safe_pmuxClifford Wolf2014-01-02
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* Major rewrite of "freduce" commandClifford Wolf2014-01-02
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* Fixed undef extend for bitwise binary ops (bugs in simplemap and satgen)Clifford Wolf2013-12-29
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* Fixed sat handling of $eqx and $nex with unequal port widthsClifford Wolf2013-12-27
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* Small cleanup in SatGenClifford Wolf2013-12-27
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* Fixed sat handling of $eqx and $nex cellsClifford Wolf2013-12-27
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* Added support for non-const === and !== (for miter circuits)Clifford Wolf2013-12-27
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* Added "sat" undef support and "sat -set-init" optionsClifford Wolf2013-12-07
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* Improvements in satgen undef handlingClifford Wolf2013-11-25
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* Improvements in satgen undef handlingClifford Wolf2013-11-25
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* Started implementing undef handling in satgenClifford Wolf2013-11-25
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* Added verification of SAT model to "eval -vloghammer_report" commandClifford Wolf2013-11-09
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