path: root/kernel/sigtools.h
Commit message (Expand)AuthorAge
* Added ModIndex helper class, some changes to RTLIL::MonitorClifford Wolf2014-08-01
* Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespaceClifford Wolf2014-07-31
* Using log_assert() instead of assert()Clifford Wolf2014-07-28
* Added SigPool::check(bit)Clifford Wolf2014-07-27
* Changed users of cell->connections_ to the new API (sed command)Clifford Wolf2014-07-26
* Renamed RTLIL::{Module,Cell}::connections to connections_Clifford Wolf2014-07-26
* Removed RTLIL::SigSpec::expand() methodClifford Wolf2014-07-23
* Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 3/3Clifford Wolf2014-07-23
* Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 2/3Clifford Wolf2014-07-23
* SigSpec refactoring: More cleanups of old SigSpec use patternClifford Wolf2014-07-22
* SigSpec refactoring: change RTLIL::SigSpec::chunks() to be read-only, created...Clifford Wolf2014-07-22
* SigSpec refactoring: using the accessor functions everywhereClifford Wolf2014-07-22
* SigSpec refactoring: renamed chunks and width to __chunks and __widthClifford Wolf2014-07-22
* Some "const" cleanups in SigMapClifford Wolf2014-07-19
* Some fixes to improve determinismClifford Wolf2013-08-09
* Fixed SigPool::del() methodClifford Wolf2013-08-06
* Improved auto-detection of -show signals in sat_solveClifford Wolf2013-06-08
* Added additional functionality and cleanups in sigtools.h and celltypes.hClifford Wolf2013-03-15
* Implemented basic functionality of "extract" passClifford Wolf2013-02-27
* initial importClifford Wolf2013-01-05