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Author
Age
*
Using next_token() to parse commands
Clifford Wolf
2014-10-10
*
Fixed next_token()
Clifford Wolf
2014-10-10
*
Added next_token() function (strtok() replacement)
Clifford Wolf
2014-10-10
*
Various win32 build fixes in yosys.cc
Clifford Wolf
2014-10-10
*
Moved patmatch() to yosys.cc
Clifford Wolf
2014-10-10
*
Replaced fnmatch() with patmatch()
Clifford Wolf
2014-10-10
*
Added format __attribute__ to stringf()
Clifford Wolf
2014-10-10
*
Renamed TRUE/FALSE to CONST_TRUE/CONST_FALSE because of name collision on Win32
Clifford Wolf
2014-10-10
*
Renamed SIZE() to GetSize() because of name collision on Win32
Clifford Wolf
2014-10-10
*
Replaced "#ifdef WIN32" with "#ifdef _WIN32"
Clifford Wolf
2014-10-09
*
Added API for generic cell cost calculations
Clifford Wolf
2014-10-09
*
No rusage on win32
Clifford Wolf
2014-10-09
*
satgen import sigbit api
Clifford Wolf
2014-10-03
*
added resource sharing of $macc cells
Clifford Wolf
2014-10-03
*
Added $_BUF_ cell type
Clifford Wolf
2014-10-03
*
Added support for "keep" on modules
Clifford Wolf
2014-09-29
*
namespace Yosys
Clifford Wolf
2014-09-27
*
Assert on new logic loops in "share" pass
Clifford Wolf
2014-09-21
*
Initialize RTLIL::Const from std::vector<bool>
Clifford Wolf
2014-09-19
*
Added new CodingReadme file (replaces CodingStyle and CHECKLISTS)
Clifford Wolf
2014-09-16
*
Added the obvious optimizations to alumacc $macc generator
Clifford Wolf
2014-09-15
*
Fixed monitor notifications for removed cell
Clifford Wolf
2014-09-14
*
Added "synth" command
Clifford Wolf
2014-09-14
*
Simplified $fa undef model
Clifford Wolf
2014-09-08
*
Added $lcu cell type
Clifford Wolf
2014-09-08
*
Added "$fa" cell type
Clifford Wolf
2014-09-08
*
Added $macc eval model
Clifford Wolf
2014-09-06
*
Added $macc SAT model
Clifford Wolf
2014-09-06
*
Added $macc cell type
Clifford Wolf
2014-09-06
*
Corrected spelling mistakes found by lintian
Ruben Undheim
2014-09-06
*
Removed $bu0 cell type
Clifford Wolf
2014-09-04
*
Using $pos models for $bu0
Clifford Wolf
2014-09-03
*
Fixes in $alu SAT- and eval-models
Clifford Wolf
2014-09-03
*
Create a default selection stack in RTLIL::Design::Design()
Clifford Wolf
2014-09-02
*
Small bug fixes in $not, $neg, and $shiftx models
Clifford Wolf
2014-09-02
*
Added ConstEval model for $alu cells
Clifford Wolf
2014-09-01
*
Added SAT model for $alu cells
Clifford Wolf
2014-09-01
*
Using std::vector<RTLIL::State> instead of RTLIL::Const for RTLIL::SigChunk::...
Clifford Wolf
2014-09-01
*
Fixed return size of const_*() eval functions
Clifford Wolf
2014-08-31
*
Added RTLIL::Const::size()
Clifford Wolf
2014-08-31
*
Added eval model for $lut cells
Clifford Wolf
2014-08-31
*
Typo fixes in cell->*Param() API
Clifford Wolf
2014-08-31
*
Added $lut support in test_cell, techmap, satgen
Clifford Wolf
2014-08-31
*
Added design->scratchpad
Clifford Wolf
2014-08-30
*
Added $alu cell type
Clifford Wolf
2014-08-30
*
Fixed module->addPmux()
Clifford Wolf
2014-08-30
*
Added is_signed argument to SigSpec.as_int() and Const.as_int()
Clifford Wolf
2014-08-24
*
Removed compatbility.{h,cc}: Not using open_memstream/fmemopen anymore
Clifford Wolf
2014-08-23
*
Changed frontend-api from FILE to std::istream
Clifford Wolf
2014-08-23
*
Changed backend-api from FILE to std::ostream
Clifford Wolf
2014-08-23
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