yosys - Debian dgit repo for package yosys

	Commit message (Collapse)	Author	Age
*	Added new CodingReadme file (replaces CodingStyle and CHECKLISTS)	Clifford Wolf	2014-09-16
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*	Added the obvious optimizations to alumacc $macc generator	Clifford Wolf	2014-09-15
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*	Fixed monitor notifications for removed cell	Clifford Wolf	2014-09-14
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*	Added "synth" command	Clifford Wolf	2014-09-14
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*	Simplified $fa undef model	Clifford Wolf	2014-09-08
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*	Added $lcu cell type	Clifford Wolf	2014-09-08
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*	Added "$fa" cell type	Clifford Wolf	2014-09-08
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*	Added $macc eval model	Clifford Wolf	2014-09-06
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*	Added $macc SAT model	Clifford Wolf	2014-09-06
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*	Added $macc cell type	Clifford Wolf	2014-09-06
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*	Corrected spelling mistakes found by lintian	Ruben Undheim	2014-09-06
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*	Removed $bu0 cell type	Clifford Wolf	2014-09-04
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*	Using $pos models for $bu0	Clifford Wolf	2014-09-03
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*	Fixes in $alu SAT- and eval-models	Clifford Wolf	2014-09-03
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*	Create a default selection stack in RTLIL::Design::Design()	Clifford Wolf	2014-09-02
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*	Small bug fixes in $not, $neg, and $shiftx models	Clifford Wolf	2014-09-02
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*	Added ConstEval model for $alu cells	Clifford Wolf	2014-09-01
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*	Added SAT model for $alu cells	Clifford Wolf	2014-09-01
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*	Using std::vector<RTLIL::State> instead of RTLIL::Const for ↵	Clifford Wolf	2014-09-01
\| \| \| \|	RTLIL::SigChunk::data
*	Fixed return size of const_*() eval functions	Clifford Wolf	2014-08-31
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*	Added RTLIL::Const::size()	Clifford Wolf	2014-08-31
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*	Added eval model for $lut cells	Clifford Wolf	2014-08-31
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*	Typo fixes in cell->*Param() API	Clifford Wolf	2014-08-31
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*	Added $lut support in test_cell, techmap, satgen	Clifford Wolf	2014-08-31
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*	Added design->scratchpad	Clifford Wolf	2014-08-30
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*	Added $alu cell type	Clifford Wolf	2014-08-30
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*	Fixed module->addPmux()	Clifford Wolf	2014-08-30
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*	Added is_signed argument to SigSpec.as_int() and Const.as_int()	Clifford Wolf	2014-08-24
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*	Removed compatbility.{h,cc}: Not using open_memstream/fmemopen anymore	Clifford Wolf	2014-08-23
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*	Changed frontend-api from FILE to std::istream	Clifford Wolf	2014-08-23
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*	Changed backend-api from FILE to std::ostream	Clifford Wolf	2014-08-23
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*	Added emscripten (emcc) support to build system and some build fixes	Clifford Wolf	2014-08-22
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*	Added "plugin" command	Clifford Wolf	2014-08-22
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*	Added mod->addGate() methods for new gate types	Clifford Wolf	2014-08-19
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*	Fixed proc_{self,share}_dirname error handling	Clifford Wolf	2014-08-17
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*	Improved sig.remove2() performance	Clifford Wolf	2014-08-17
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*	Added stackmap<> container	Clifford Wolf	2014-08-17
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*	Renamed toposort.h to utils.h	Clifford Wolf	2014-08-17
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*	Added module->uniquify()	Clifford Wolf	2014-08-16
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*	Added additional gate types: $_NAND_ $_NOR_ $_XNOR_ $_AOI3_ $_OAI3_ $_AOI4_ ↵	Clifford Wolf	2014-08-16
\| \| \| \|	$_OAI4_
*	Added CellTypes::cell_evaluable()	Clifford Wolf	2014-08-16
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*	Added log_spacer()	Clifford Wolf	2014-08-16
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*	Renamed $lut ports to follow A-Y naming scheme	Clifford Wolf	2014-08-15
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*	Renamed $_INV_ cell type to $_NOT_	Clifford Wolf	2014-08-15
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*	More idstring sort_by_* helpers and fixed tpl ordering in techmap	Clifford Wolf	2014-08-15
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*	Added Frontend "+/" filename syntax for files from proc_share_dir	Clifford Wolf	2014-08-15
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*	Added RTLIL::SigSpec::to_sigbit_map()	Clifford Wolf	2014-08-14
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*	Added sig.{replace,remove,extract} variants for std::{map,set} pattern	Clifford Wolf	2014-08-14
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*	Added module->ports	Clifford Wolf	2014-08-14
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*	Refactoring of CellType class	Clifford Wolf	2014-08-14
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