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* Hotfix for kernel/compatibility.hClifford Wolf2014-03-13
* Merged OSX fixes from Siesh1oo with some modificationsClifford Wolf2014-03-13
* - kernel/register.h, kernel/driver.cc: refactor rewrite_yosys_exe()/get_shar...Siesh1oo2014-03-12
* Added libs/minisat (copy of minisat git master)Clifford Wolf2014-03-12
* Merged a few fixes for non-posix systems from github.com/Siesh1oo/yosysClifford Wolf2014-03-11
* Fixed a typo in RTLIL::Module::addReduce...Clifford Wolf2014-03-10
* Added RTLIL::Module::add... helper methodsClifford Wolf2014-03-10
* Fixed use of frozen literals in SatGenClifford Wolf2014-03-06
* Strictly zero-extend unsigned A-inputs of shift operationsClifford Wolf2014-03-06
* Fixed const folding of $bu0 cellsClifford Wolf2014-02-27
* Added support for $bu0 to SatGenClifford Wolf2014-02-26
* Added support for Minisat::SimpSolver + ezSAT frezze() APIClifford Wolf2014-02-23
* Fixed small memory leak in Pass::call()Clifford Wolf2014-02-23
* Added "design -push" and "design -pop"Clifford Wolf2014-02-20
* Improved checking of internal cell conventionsClifford Wolf2014-02-08
* Added $slice and $concat to CellTypes listClifford Wolf2014-02-07
* Added $slice and $concat cell typesClifford Wolf2014-02-07
* Stronger checking of internal cellsClifford Wolf2014-02-07
* Added echo commandClifford Wolf2014-02-07
* Added generic RTLIL::SigSpec::parse_sel() with support for selection variablesClifford Wolf2014-02-06
* Added support for #-comments in same line as commandClifford Wolf2014-02-06
* Added support for backslash continuation in script filesClifford Wolf2014-02-06
* Fixed bug in sequential sat proofs and improved handling of assertsClifford Wolf2014-02-04
* Added TRANSPARENT parameter to $memrd (and RD_TRANSPARENT to $mem)Clifford Wolf2014-02-03
* Added RTLIL::SigSpec::to_single_sigbit()Clifford Wolf2014-02-02
* Added yosys -H for command listClifford Wolf2014-01-30
* Added -h command line optionClifford Wolf2014-01-29
* Added $assert support to satgenClifford Wolf2014-01-19
* Added $assert cellClifford Wolf2014-01-19
* Some improvements in log_dump_val_worker() templatesClifford Wolf2014-01-17
* Added select -assert-none and -assert-anyClifford Wolf2014-01-17
* Fixed SAT and ConstEval undef handling for $pmux and $safe_pmuxClifford Wolf2014-01-03
* Added RTLIL::SigSpec::optimized() APIClifford Wolf2014-01-03
* Added correct handling of $memwr priorityClifford Wolf2014-01-03
* Added SAT undef model for $pmux and $safe_pmuxClifford Wolf2014-01-02
* Major rewrite of "freduce" commandClifford Wolf2014-01-02
* Added additional checks for A_SIGNED == B_SIGNED for cells with that constraintClifford Wolf2013-12-31
* Fixed undef extend for bitwise binary ops (bugs in simplemap and satgen)Clifford Wolf2013-12-29
* Added $bu0 cell (for easy correct $eq/$ne mapping)Clifford Wolf2013-12-28
* Fixed sat handling of $eqx and $nex with unequal port widthsClifford Wolf2013-12-27
* Small cleanup in SatGenClifford Wolf2013-12-27
* Fixed sat handling of $eqx and $nex cellsClifford Wolf2013-12-27
* Added support for non-const === and !== (for miter circuits)Clifford Wolf2013-12-27
* Added proper === and !== support in constant expressionsClifford Wolf2013-12-27
* Added log_dump() APIClifford Wolf2013-12-20
* Added "sat" undef support and "sat -set-init" optionsClifford Wolf2013-12-07
* Fixed uninitialized const flags bugClifford Wolf2013-12-07
* Fixes and improvements in RTLIL::SigSpec::parseClifford Wolf2013-12-07
* Replaced signed_parameters API with CONST_FLAG_SIGNEDClifford Wolf2013-12-04
* Replaced RTLIL::Const::str with generic decoder methodClifford Wolf2013-12-04