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* New upstream version 0.7+20181007git9850de4Ruben Undheim2018-10-15
* New upstream version 0.7+20180830git0b7a184Ruben Undheim2018-08-30
* Imported yosys 0.7Ruben Undheim2016-11-03
* Squashed commit of the following:Ruben Undheim2016-09-23
* Updated command reference in manualClifford Wolf2016-02-14
* Remove nonportable "-r" option from xargsMicah Elizabeth Scott2015-12-15
* Added read-enable to memory modelClifford Wolf2015-09-25
* Another block of spelling fixesLarry Doolittle2015-08-14
* Re-created command-reference-manual.tex, copied some doc fixes to online helpClifford Wolf2015-08-14
* Spell check (by Larry Doolittle)Clifford Wolf2015-08-14
* More ASCII encoding fixesClifford Wolf2015-08-13
* Fixed CRLF line endingsClifford Wolf2015-08-13
* Some ASCII encoding fixes (comments and docs) by Larry DoolittleClifford Wolf2015-08-13
* Fixed trailing whitespacesClifford Wolf2015-07-02
* appnote 012 fixClifford Wolf2015-04-04
* Appnote 012Clifford Wolf2015-04-04
* Merge branch 'master' of https://github.com/cliffordwolf/yosysAhmed Irfan2015-04-03
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| * Added blif reference to appnote 010Clifford Wolf2015-03-22
| * Added $assume cell typeClifford Wolf2015-02-26
| * Fixed creation of command reference in manualClifford Wolf2015-02-09
| * Updated command reference in manualClifford Wolf2015-02-09
| * Various presentation fixesClifford Wolf2015-02-09
| * Added $equiv cell typeClifford Wolf2015-01-19
| * Improvements in CodingReadmeClifford Wolf2014-12-31
| * Added more documentation fixmes for nontrivial register cellsClifford Wolf2014-12-08
| * manual/presentation.tex: bg option is unknown with beamer 3.3 in beamercolorboxFabien Marteau2014-12-07
| * suppressing semi-colon at the end of dot filesFabien Marteau2014-12-05
| * Added some missing .gitignore in manual/Clifford Wolf2014-12-04
| * Some fixes in stubnets exampleClifford Wolf2014-11-24
| * Some fixes in presentationClifford Wolf2014-11-08
| * Various documentation updatesClifford Wolf2014-11-08
| * Renamed SIZE() to GetSize() because of name collision on Win32Clifford Wolf2014-10-10
* | appnote for verilog to btorAhmed Irfan2015-04-03
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* Added $lcu cell typeClifford Wolf2014-09-08
* Corrected spelling mistakes found by lintianRuben Undheim2014-09-06
* Removed $bu0 cell typeClifford Wolf2014-09-04
* Removed references to yosys-svgviewer from docsClifford Wolf2014-09-02
* Added $alu cell typeClifford Wolf2014-08-30
* Added additional gate types: $_NAND_ $_NOR_ $_XNOR_ $_AOI3_ $_OAI3_ $_AOI4_ $...Clifford Wolf2014-08-16
* Renamed $_INV_ cell type to $_NOT_Clifford Wolf2014-08-15
* Removed old doc references to $safe_pmuxClifford Wolf2014-08-15
* RIP $safe_pmuxClifford Wolf2014-08-14
* Replaced sha1 implementationClifford Wolf2014-08-01
* Added module->design and cell->module, wire->module pointersClifford Wolf2014-07-31
* Renamed "stdcells.v" to "techmap.v"Clifford Wolf2014-07-31
* Refactoring: Renamed RTLIL::Design::modules to modules_Clifford Wolf2014-07-27
* Refactoring: Renamed RTLIL::Module::cells to cells_Clifford Wolf2014-07-27
* Refactoring: Renamed RTLIL::Module::wires to wires_Clifford Wolf2014-07-27
* Changed users of cell->connections_ to the new API (sed command)Clifford Wolf2014-07-26
* Renamed RTLIL::{Module,Cell}::connections to connections_Clifford Wolf2014-07-26