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* Various win32 / vs build fixesClifford Wolf2014-10-17
* Various MXE build fixesClifford Wolf2014-10-17
* Header changes so it will compile on VSWilliam Speirs2014-10-17
* Replaced readsome() with read() and gcount()Clifford Wolf2014-10-15
* Added run_command() api to replace system() and popen()Clifford Wolf2014-10-12
* Renamed "log.cc" to "logcmd.cc" so there aren't two "log.cc" in the source treeClifford Wolf2014-10-11
* Fixed win32 troubles with f.readsome()Clifford Wolf2014-10-11
* Disabled "cover -d" on win32Clifford Wolf2014-10-11
* Moved patmatch() to yosys.ccClifford Wolf2014-10-10
* Replaced fnmatch() with patmatch()Clifford Wolf2014-10-10
* Added format __attribute__ to stringf()Clifford Wolf2014-10-10
* Renamed SIZE() to GetSize() because of name collision on Win32Clifford Wolf2014-10-10
* sort cell types in "stat" output by nameClifford Wolf2014-10-03
* namespace YosysClifford Wolf2014-09-27
* Alphabetically sort port names in "show" outputClifford Wolf2014-09-19
* Corrected spelling mistakes found by lintianRuben Undheim2014-09-06
* Removed $bu0 cell typeClifford Wolf2014-09-04
* Removed references to yosys-svgviewer from docsClifford Wolf2014-09-02
* Using "xdot" instead of "yosys-svgviewer" in show commandClifford Wolf2014-09-02
* Moved "share" and "wreduce" to passes/opt/Clifford Wolf2014-09-01
* Implemented "rename -enumerate -pattern"Clifford Wolf2014-08-26
* Changed frontend-api from FILE to std::istreamClifford Wolf2014-08-23
* Added "stat -width"Clifford Wolf2014-08-22
* Added emscripten (emcc) support to build system and some build fixesClifford Wolf2014-08-22
* Added "plugin" commandClifford Wolf2014-08-22
* Added module->uniquify()Clifford Wolf2014-08-16
* RIP $safe_pmuxClifford Wolf2014-08-14
* Fixed build with gcc-4.6Clifford Wolf2014-08-07
* Various fixes and improvements in wreduce passClifford Wolf2014-08-05
* Removed old "constmap" from wreduce codeClifford Wolf2014-08-05
* Added support for truncating of wires to wreduce passClifford Wolf2014-08-05
* Cleanups and improvements in wreduce passClifford Wolf2014-08-05
* Added mux support to wreduce commandClifford Wolf2014-08-05
* Added "show -signed"Clifford Wolf2014-08-04
* Added RTLIL::IdString::in(...)Clifford Wolf2014-08-04
* Progress in "wreduce" passClifford Wolf2014-08-03
* Added "wreduce" command (work in progress)Clifford Wolf2014-08-03
* Fixes in show command (related to new IdString)Clifford Wolf2014-08-03
* No implicit conversion from IdString to anything elseClifford Wolf2014-08-02
* More bugfixes related to new RTLIL::IdStringClifford Wolf2014-08-02
* More cleanups related to RTLIL::IdString usageClifford Wolf2014-08-02
* Preparations for RTLIL::IdString redesign: cleanup of existing codeClifford Wolf2014-08-02
* Added ModIndex helper class, some changes to RTLIL::MonitorClifford Wolf2014-08-01
* Renamed port access function on RTLIL::Cell, added param access functionsClifford Wolf2014-07-31
* Added "trace" commandClifford Wolf2014-07-31
* Added module->design and cell->module, wire->module pointersClifford Wolf2014-07-31
* Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespaceClifford Wolf2014-07-31
* Added write_file commandClifford Wolf2014-07-30
* Using log_assert() instead of assert()Clifford Wolf2014-07-28
* Refactoring: Renamed RTLIL::Design::modules to modules_Clifford Wolf2014-07-27