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opt_clean.cc
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Age
*
Squashed commit of the following:
Ruben Undheim
2016-09-23
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Use alphanumerical order instead of idstring idx in opt_clean compare_signals()
Clifford Wolf
2016-02-02
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Fixed opt_clean handling of inout ports
Clifford Wolf
2015-08-16
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Improved handling of "keep" attributes in hierarchical designs in opt_clean
Clifford Wolf
2015-08-12
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Merge pull request #70 from gaomy3832/bugfix
Clifford Wolf
2015-08-12
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Remove unused blackbox modules in opt_clean.
Mingyu Gao
2015-08-11
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Added missing ct_all setup to opt_clean
Clifford Wolf
2015-08-11
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Fixed trailing whitespaces
Clifford Wolf
2015-07-02
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preserve used $-wires with init attribute in opt_clean
Clifford Wolf
2015-05-22
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Added non-std verilog assume() statement
Clifford Wolf
2015-02-26
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Some cleanups in "clean"
Clifford Wolf
2015-02-24
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Added $meminit cell type
Clifford Wolf
2015-02-14
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Fixed opt_clean performance bug
Clifford Wolf
2015-02-04
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Using design->selected_modules() in opt_*
Clifford Wolf
2015-02-03
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Added dict/pool.sort()
Clifford Wolf
2015-01-24
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Cleanups in opt_clean
Clifford Wolf
2014-12-29
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dict/pool changes in opt_clean
Clifford Wolf
2014-12-29
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Renamed hashmap.h to hashlib.h, some related improvements
Clifford Wolf
2014-12-28
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More hashtable finetuning
Clifford Wolf
2014-12-27
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Replaced std::unordered_set (nodict) with Yosys::pool
Clifford Wolf
2014-12-26
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Added Yosys::{dict,nodict,vector} container types
Clifford Wolf
2014-12-26
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Fixed various VS warnings
Clifford Wolf
2014-10-18
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Some cleanups in opt_clean
Clifford Wolf
2014-10-16
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Renamed SIZE() to GetSize() because of name collision on Win32
Clifford Wolf
2014-10-10
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Added $_BUF_ cell type
Clifford Wolf
2014-10-03
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remove buffers in opt_clean
Clifford Wolf
2014-10-03
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Added support for "keep" on modules
Clifford Wolf
2014-09-29
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namespace Yosys
Clifford Wolf
2014-09-27
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Corrected spelling mistakes found by lintian
Ruben Undheim
2014-09-06
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Added design->scratchpad
Clifford Wolf
2014-08-30
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More idstring sort_by_* helpers and fixed tpl ordering in techmap
Clifford Wolf
2014-08-15
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More cleanups related to RTLIL::IdString usage
Clifford Wolf
2014-08-02
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Using log_assert() instead of assert()
Clifford Wolf
2014-07-28
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Added SigPool::check(bit)
Clifford Wolf
2014-07-27
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Fixed bug in opt_clean
Clifford Wolf
2014-07-27
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Fixed a bug in opt_clean and some RTLIL API usage cleanups
Clifford Wolf
2014-07-27
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Refactoring: Renamed RTLIL::Design::modules to modules_
Clifford Wolf
2014-07-27
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Refactoring: Renamed RTLIL::Module::cells to cells_
Clifford Wolf
2014-07-27
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Refactoring: Renamed RTLIL::Module::wires to wires_
Clifford Wolf
2014-07-27
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Changed a lot of code to the new RTLIL::Wire constructors
Clifford Wolf
2014-07-26
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Manual fixes for new cell connections API
Clifford Wolf
2014-07-26
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Changed users of cell->connections_ to the new API (sed command)
Clifford Wolf
2014-07-26
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Renamed RTLIL::{Module,Cell}::connections to connections_
Clifford Wolf
2014-07-26
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Use only module->addCell() and module->remove() to create and delete cells
Clifford Wolf
2014-07-25
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Replaced more old SigChunk programming patterns
Clifford Wolf
2014-07-24
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Removed RTLIL::SigSpec::optimize()
Clifford Wolf
2014-07-23
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Removed RTLIL::SigSpec::expand() method
Clifford Wolf
2014-07-23
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Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 3/3
Clifford Wolf
2014-07-23
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Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 2/3
Clifford Wolf
2014-07-23
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SigSpec refactoring: using the accessor functions everywhere
Clifford Wolf
2014-07-22
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